公开(公告)号：US20020190353A1

公开(公告)日：2002-12-19

申请号：US09883288

申请日：2001-06-19

Inventor： Jyh-Sheng Pan ,  Kuo-Ching Liu ,  Yu-Tai Chen ,  Li-Wei Chen ,  Fu-Chun Huang

IPC: H05K005/06 ,  H01L023/495 ,  H01L023/48

CPC classification number: H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: The present invention provides a plastic package structure for a communication component. The plastic package structure comprises a leadframe and a die. Two sides of a die pad of the leadframe have two protruding portions. The die is glued on the protruding portions of the die pad to form a hollow region between the die and the die pad. After the operation of soldering, an insulating seal is used to seal the other two sides of the die and the die pad to form a closed cavity on the circuit face of the die. An encapsulation is then used to sheathe all the above parts. Thereby, a plastic package for a communication component provided by the present invention has low cost and high production speed, and is suitable to mass production.

Abstract translation: 本发明提供一种用于通信部件的塑料封装结构。 塑料封装结构包括引线框架和模具。 引线框的芯片焊盘的两侧具有两个突出部分。 将模具胶合在芯片焊盘的突出部分上以在芯片和芯片焊盘之间形成中空区域。 在焊接操作之后，使用绝缘密封来密封管芯和管芯焊盘的另外两侧，以在管芯的电路面上形成闭合的腔。 然后使用封装来覆盖所有上述部件。 因此，本发明提供的通信部件用塑料封装件具有成本低，生产速度快，适合批量生产。

公开(公告)号：US20020182773A1

公开(公告)日：2002-12-05

申请号：US09871623

申请日：2001-06-04

Applicant: Walsin Advanced Electronics LTD

Inventor： Chun-Jen Su ,  Chien-Hung Lai ,  Chien-Tsun Lin ,  Chao-Chia Chang

IPC: H01L023/495 ,  H01L023/48 ,  H01L021/44 ,  H01L021/48 ,  H01L021/50

CPC classification number: H01L23/49558 ,  H01L23/49531 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method for bonding inner leads of lead frame to substrate includes the steps of: (a) providing a substrate, the substrate having a plurality of connection pads formed on the electrical bonding surface of the substrate; (b) providing a lead frame with a dam tape adhered on of the inner leads of the lead frame; (c) thermally compressing the inner leads of lead frame onto the substrate, wherein a solder material is formed between the inner end and the corresponding connection pad of the substrate and the solder material is limited by the dam tape during inner lead bonding, so that there is stable electrical and mechanical connection between inner leads and the substrate.

Abstract translation: 引线框架的内引线与衬底的接合方法包括以下步骤：（a）提供衬底，所述衬底具有形成在衬底的电接合表面上的多个连接焊盘; （b）提供具有粘附在引线框架的内引线上的阻尼带的引线框架; （c）将引线框架的内部引线热压到基板上，其中在内部端部和相应的基板连接焊盘之间形成焊料材料，并且焊接材料在内部引线接合期间被阻挡带限制，使得 内部引线与基板之间电气和机械连接稳定。

公开(公告)号：US20020180008A1

公开(公告)日：2002-12-05

申请号：US10200847

申请日：2002-07-22

Inventor： David J. Corisis

IPC: H01L023/495

CPC classification number: H01L23/4951 ,  H01L23/49503 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49121 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/85399

Abstract: A semiconductor device assembly including a semiconductor device having a plurality of bond pads on the active surface thereof and a lead frame having a portion of the plurality of lead fingers of the lead frame located below the semiconductor device in a substantially horizontal plane and another portion of the plurality of lead fingers of the lead frame located substantially in the same horizontal plane as the active surface of the semiconductor device. Both pluralities of lead fingers of the lead frame having their ends being located substantially adjacent the peripheral sides of the semiconductor device, rather than at the ends thereof.

公开(公告)号：US20020175396A1

公开(公告)日：2002-11-28

申请号：US10099193

申请日：2002-03-13

Inventor： Hiroshi Ogura ,  Yoshikazu Yoshida

IPC: H01L021/44 ,  H01L023/495 ,  H01L023/053

CPC classification number: H05K3/0032 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/16152 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/0366 ,  H05K1/0373 ,  H05K2201/0112 ,  H05K2201/0209 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A dielectric substrate for laser working contains a substance having a size of a half to 10 times of a laser light wavelength and different in refractive index from a material of the dielectric substrate. This substance enhances the absorption of a laser beam. Due to this, the energy loss in laser beam is transformed into the heat of fusion to form a penetration hole, thereby forming a well-formed penetration hole. The substance different in refractive index from the dielectric substrate material uses bubbles when the dielectric substrate is a quartz glass substrate, and a glass bead or fiber when it is a resin substrate.

Abstract translation: 用于激光加工的电介质基板包含尺寸为激光波长的一半至10倍的物质，并且与介质基板的材料的折射率不同的物质。 该物质增强了激光束的吸收。 由此，将激光束的能量损失变换为熔融热，形成贯通孔，形成良好的贯通孔。 当电介质基板是石英玻璃基板时，折射率与电介质基板材料不同的物质使用气泡，当玻璃珠或纤维是树脂基板时，使用气泡。

公开(公告)号：US20020167075A1

公开(公告)日：2002-11-14

申请号：US09855820

申请日：2001-05-14

Inventor： Ruben Madrid

IPC: H01L023/495

CPC classification number: H01L23/492 ,  H01L21/4846 ,  H01L21/4878 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73153 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01322 ,  H01L2924/12044 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A carrier for a semiconductor die package is disclosed. In one embodiment, the carrier includes a metal layer and a plurality of bumps formed in the metal layer. The bumps can be formed by stamping.

Abstract translation: 公开了一种用于半导体管芯封装的载体。 在一个实施例中，载体包括金属层和形成在金属层中的多个凸块。 凸块可以通过冲压形成。

公开(公告)号：US20020158316A1

公开(公告)日：2002-10-31

申请号：US09842133

申请日：2001-04-26

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Jui-Chung Lee ,  Chen-Jung Tsai ,  Chih-Wen Lin

IPC: H01L023/495 ,  H01L023/02

CPC classification number: H01L23/49575 ,  H01L23/49513 ,  H01L23/49551 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48471 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48227 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a structure of a stacked-type multi-chip stack package of the leadframe. The shape of the stair-like inner leads can be regulated for the high and the amount of stacked chips and to match different bonding technology. The process for forming the present structure can be easily performed by visible equipment and materials, and the present structure can raise the reliability of bonding process. The present invention can stack multi-chip (more than two).

Abstract translation: 本发明提供了引线框的堆叠型多芯片堆叠封装的结构。 可以调节阶梯状内部引线的形状，以便堆叠芯片的高度和数量，并且可以匹配不同的焊接技术。 用于形成本结构的方法可以通过可见的设备和材料容易地进行，并且本结构可以提高接合过程的可靠性。 本发明可以堆叠多芯片（多于两个）。

公开(公告)号：US20020145196A1

公开(公告)日：2002-10-10

申请号：US09835012

申请日：2001-04-13

Inventor： Mu-Chun Wang

IPC: H01L023/495

CPC classification number: H01L23/564 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

Abstract: A structure of a cross guard ring along the edge of a semiconductor chip is disclosed. A first guard ring, a second guard ring and a third guard ring are formed along the edge of a semiconductor chip. Each guard ring comprises several rectangle shaped vias which are positioned along the edge of the chip structure, wherein each rectangle via is separated from an adjacent rectangle via by a gap. Further, each rectangle via of the second guard ring is positioned opposite the said gap of the first guard ring and are crossed over and have some overlay with rectangle vias of the first guard ring which are separated by the said gap as shown in FIG. 2. Similarly the third guard ring is positioned with respect to the second guard ring.

Abstract translation: 公开了沿着半导体芯片的边缘的十字保护环的结构。 沿着半导体芯片的边缘形成第一保护环，第二保护环和第三保护环。 每个保护环包括沿着芯片结构的边缘定位的几个矩形通孔，其中每个矩形通孔与相邻的矩形通孔间隔开。 此外，第二保护环的每个矩形通孔定位成与第一保护环的所述间隙相对，并与第一保护环的矩形通孔交叉并且具有一些覆盖层，该第二保护环的矩形通孔由所述间隙分开，如图3所示。 类似地，第三保护环相对于第二保护环定位。

公开(公告)号：US20020145182A1

公开(公告)日：2002-10-10

申请号：US09955695

申请日：2001-09-19

Inventor： John W. Smith ,  Bruce McWilliams

IPC: H01L023/495

CPC classification number: H01L24/28 ,  G01R1/0483 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03001 ,  H01L2224/0311 ,  H01L2224/03334 ,  H01L2224/0384 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05556 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/73203 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of making a microelectronic package having an array of resilient leads includes providing a first element having a plurality of conductive leads at a first surface thereof, the conductive leads having terminal ends permanently attached to the first element and tip ends remote from the terminal ends, the tip ends being movable relative to the terminal ends. A second element having a plurality of contacts on a first surface thereof is then juxtaposed with the first surface of the first element, and the tip ends of the conductive leads are connected with the contacts of the second microelectronic element. The first and second elements are then moved away from one another so as to vertically extend the conductive leads between the first and second elements. After the moving step, a layer of a spring-like conductive material is formed over the conductive leads to form composite leads. The layer of a spring-like material desirably has greater yield strength than the conductive leads, thereby enhancing the resiliency of the composite lead structure.

Abstract translation: 制造具有弹性引线阵列的微电子封装的方法包括在其第一表面提供具有多个导电引线的第一元件，所述导电引线具有永久地附接到第一元件的末端，并且末端远离末端 末端可相对于末端移动。 然后在其第一表面上具有多个触点的第二元件与第一元件的第一表面并置，并且导电引线的末端与第二微电子元件的触点连接。 然后将第一和第二元件彼此远离，以便在第一和第二元件之间垂直地延伸导电引线。 在移动步骤之后，在导电引线上形成弹簧状导电材料层以形成复合引线。 弹簧状材料的层理想地具有比导电引线更大的屈服强度，从而提高复合引线结构的弹性。

公开(公告)号：US20020145181A1

公开(公告)日：2002-10-10

申请号：US09829208

申请日：2001-04-09

Applicant: DELPHI TECHNOLOGIES, INC.

Inventor： Ronald D. Myer ,  David J. Post ,  Bradley R. Knigga ,  Paul C. Staab

IPC: H01L023/495

CPC classification number: H01L23/047 ,  H01L21/50 ,  H01L23/24 ,  H01L24/97 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  Y10T83/0605 ,  Y10T83/159 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of fabricating a microelectronic device package is provided. The method includes a continuous processing mode of microelectronic device packages wherein process steps for fabricating the microelectronic device package are performed resulting in savings from the removal of more expensive batch processing steps.

公开(公告)号：US20020145180A1

公开(公告)日：2002-10-10

申请号：US09827246

申请日：2001-04-06

Inventor： Makoto Terui ,  Noritaka Anzai

IPC: H01L023/495 ,  H05K007/06 ,  H01L023/498

CPC classification number: H01L24/49 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49503 ,  H01L23/49589 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/642 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/85447 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12044 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0231 ,  H05K1/183 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/8384

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract translation: 引线框架型半导体装置包括其上安装半导体芯片的管芯焊盘; 要接地的接地端子; 连接到电源的电源端子; 连接到接地端子和电源端子的内部引线，其中用于电源端子和接地端子的一对相邻内部引线向内延伸; 芯片电容器安装垫，设置在延伸的内引线的内端; 以及安装在芯片电容器安装焊盘上以便提供去耦电容器的芯片电容器。