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    Semiconductor memory device
    74.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11557596B2

    公开(公告)日：2023-01-17

    申请号：US17192086

    申请日：2021-03-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seoryong Park ,  Seunguk Han ,  Jiyoung Ahn ,  Kiseok Lee ,  Yoonyoung Choi ,  Jiseok Hong

    IPC: H01L27/11551 ,  H01L27/11519 ,  G11C8/14 ,  H01L27/11578 ,  G11C7/18 ,  H01L27/11565

    Abstract: A semiconductor memory device includes a substrate with a cell array region, a first interface region, and a second interface region, the cell array region being provided with active regions, bit lines on the cell array region and the second interface region, dielectric patterns on top surfaces of the bit lines and extending along the top surfaces of the bit lines and further extending onto the first interface region, a device isolation pattern on the substrate, and including a first portion on the cell array region and a second portion on the first interface region, the first portion defining the active regions, the second portion being provided with first recesses, and each first recess being disposed between two adjacent dielectric patterns, and first sacrificial semiconductor patterns disposed on the first interface region and in the first recesses. The first sacrificial semiconductor patterns include polycrystalline silicon.

    Semiconductor devices and methods for fabricating the same
    76.
    发明授权
    Semiconductor devices and methods for fabricating the same 有权

    公开(公告)号：US11201156B2

    公开(公告)日：2021-12-14

    申请号：US16934874

    申请日：2020-07-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Chan-Sic Yoon ,  Dongoh Kim ,  Kiseok Lee ,  Sunghak Cho ,  Jemin Park

    IPC: H01L27/108 ,  H01L21/762 ,  H01L21/311

    Abstract: A semiconductor device includes a substrate that includes a cell region and a peripheral circuit region, a cell insulating pattern disposed in the cell region of the substrate that defines a cell active region, and a peripheral insulating pattern disposed in the peripheral circuit region of the substrate that defines a peripheral active region. The peripheral insulating pattern includes a first peripheral insulating pattern having a first width and a second peripheral insulating pattern having a second width greater than the first width. A topmost surface of at least one of the first peripheral insulating pattern and the second peripheral insulating pattern is positioned higher than a topmost surface of the cell insulating pattern.

    SEMICONDUCTOR AND MANUFACTURING METHOD OF THE SAME
    77.
    发明申请
    SEMICONDUCTOR AND MANUFACTURING METHOD OF THE SAME 有权

    公开(公告)号：US20210066305A1

    公开(公告)日：2021-03-04

    申请号：US16896470

    申请日：2020-06-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyosub Kim ,  Keunnam Kim ,  Dongoh Kim ,  Bongsoo Kim ,  Euna Kim ,  Chansic Yoon ,  Kiseok Lee ,  Hyeonok Jung ,  Sunghee Han ,  Yoosang Hwang

    IPC: H01L27/108 ,  H01L23/528

    Abstract: A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.

    Semiconductor memory devices
    78.
    发明授权
    Semiconductor memory devices 有权

    公开(公告)号：US10861854B2

    公开(公告)日：2020-12-08

    申请号：US16707019

    申请日：2019-12-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jiyoung Kim ,  Kiseok Lee ,  Bong-Soo Kim ,  Junsoo Kim ,  Dongsoo Woo ,  Kyupil Lee ,  HyeongSun Hong ,  Yoosang Hwang

    IPC: H01L27/108 ,  H01L27/06 ,  H01L49/02

    Abstract: Semiconductor memory devices are provided. A semiconductor memory device includes a substrate. The semiconductor memory device includes a plurality of memory cell transistors vertically stacked on the substrate. The semiconductor memory device includes a first conductive line connected to a source region of at least one of the plurality of memory cell transistors. The semiconductor memory device includes a second conductive line connected to a plurality of gate electrodes of the plurality of memory cell transistors. Moreover, the semiconductor memory device includes a data storage element connected to a drain region of the at least one of the plurality of memory cell transistors.

    Semiconductor memory devices
    80.
    发明授权
    Semiconductor memory devices 有权

    公开(公告)号：US10535659B2

    公开(公告)日：2020-01-14

    申请号：US16038052

    申请日：2018-07-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jiyoung Kim ,  Kiseok Lee ,  Bong-Soo Kim ,  Junsoo Kim ,  Dongsoo Woo ,  Kyupil Lee ,  HyeongSun Hong ,  Yoosang Hwang

    IPC: H01L27/108 ,  H01L27/06 ,  H01L49/02

    Abstract: Semiconductor memory devices are provided. A semiconductor memory device includes a substrate. The semiconductor memory device includes a plurality of memory cell transistors vertically stacked on the substrate. The semiconductor memory device includes a first conductive line connected to a source region of at least one of the plurality of memory cell transistors. The semiconductor memory device includes a second conductive line connected to a plurality of gate electrodes of the plurality of memory cell transistors. Moreover, the semiconductor memory device includes a data storage element connected to a drain region of the at least one of the plurality of memory cell transistors.

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