公开(公告)号：US20230247825A1

公开(公告)日：2023-08-03

申请号：US17970799

申请日：2022-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonok Jung ,  Donghwa Shin ,  Hoin Ryu ,  Youngseung Cho

IPC: H01L27/108

CPC classification number: H01L27/10897 ,  H01L27/10814

Abstract: A semiconductor device may include a substrate extending in a first direction and a second direction perpendicular to the first direction, the substrate including a memory cell region, a peripheral circuit region, and a boundary region between the memory cell region and the peripheral circuit region, first active patterns in the memory cell region, each of the first active patterns extending in a third direction oblique to the first direction, and a silicon dam structure in the boundary region. The silicon dam structure may include a silicon dam pattern including trench lines extending in the oblique direction and a dam isolation pattern in the trench lines.

公开(公告)号：US11114445B2

公开(公告)日：2021-09-07

申请号：US16909200

申请日：2020-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jay-Bok Choi ,  Hyeonok Jung ,  Jemin Park ,  Yongseok Ahn

IPC: H01L27/108 ,  H01L27/11529 ,  H01L27/11548 ,  G11C7/06

Abstract: A semiconductor device includes a substrate having an active pattern, a cell region on the substrate and having a cell circuit, and a core region on the substrate having a peripheral circuit. In plan view, the active pattern on the core region includes a plurality of corners. Each of the corners has a rounding index that is equal to or less than about 15 nm. The rounding index is a distance between a respective tip of each of the corners and a right-angled corner.

公开(公告)号：US20210351184A1

公开(公告)日：2021-11-11

申请号：US17384347

申请日：2021-07-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyosub Kim ,  Keunnam Kim ,  Dongoh Kim ,  Bongsoo Kim ,  Euna Kim ,  Chansic Yoon ,  Kiseok Lee ,  Hyeonok Jung ,  Sunghee Han ,  Yoosang Hwang

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.

公开(公告)号：US09691627B2

公开(公告)日：2017-06-27

申请号：US14963368

申请日：2015-12-09

Applicant: Samsung Electronics Co., Ltd

Inventor： Chan-Sic Yoon ,  Jiung Pak ,  Kiseok Lee ,  Chan Ho Park ,  Hyeonok Jung

IPC: H01L21/308 ,  H01L27/108

CPC classification number: H01L21/3088 ,  H01L21/3086 ,  H01L27/10814 ,  H01L27/10876

Abstract: A method of fabricating a semiconductor device includes forming a linear preliminary mask pattern in a first direction on a substrate. The preliminary mask pattern is patterned to provide a plurality of mask patterns that are aligned end-to-end with one another on the substrate and are separated by an exposed portion of the substrate between respective facing ends of the plurality of mask patterns. An auxiliary layer is formed to cover at least sidewalls of the facing ends to reduce a size of the exposed portion to provide a reduced exposed portion of the substrate and the reduced exposed portion of the substrate is etched to form a trench defining active patterns in the substrate aligned end-to-end with one another.

公开(公告)号：US20240284664A1

公开(公告)日：2024-08-22

申请号：US18462677

申请日：2023-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungeun Kim ,  Jinyeong Kim ,  Sungyeon Ryu ,  Hyeonok Jung ,  Sei-Ryung Choi

IPC: H10B12/00

CPC classification number: H10B12/50 ,  H10B12/315 ,  H10B12/482 ,  H10B12/488

Abstract: A semiconductor device includes peripheral active patterns on a substrate, first and second peripheral trench regions adjacent the peripheral active patterns, a first isolation liner on inner surfaces of the first and second peripheral trench regions, a second isolation liner on the first isolation liner in the first and second peripheral trench regions, and a device isolation layer on the second isolation liner in the first and second peripheral trench regions. The device isolation layer includes a seam therein in the second peripheral trench region. A width of the first peripheral trench region is greater than a width of the second peripheral trench region at a first height corresponding to top surfaces of the peripheral active patterns with respect to the substrate.

公开(公告)号：US20210111178A1

公开(公告)日：2021-04-15

申请号：US16909200

申请日：2020-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jay-Bok Choi ,  Hyeonok Jung ,  Jemin Park ,  Yongseok Ahn

IPC: H01L27/108 ,  H01L27/11548 ,  G11C7/06 ,  H01L27/11529

Abstract: A semiconductor device includes a substrate having an active pattern, a cell region on the substrate and having a cell circuit, and a core region on the substrate having a peripheral circuit. In plan view, the active pattern on the core region includes a plurality of corners. Each of the corners has a rounding index that is equal to or less than about 15 nm. The rounding index is a distance between a respective tip of each of the corners and a right-angled corner.

公开(公告)号：US11917815B2

公开(公告)日：2024-02-27

申请号：US18123736

申请日：2023-03-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyosub Kim ,  Keunnam Kim ,  Dongoh Kim ,  Bongsoo Kim ,  Euna Kim ,  Chansic Yoon ,  Kiseok Lee ,  Hyeonok Jung ,  Sunghee Han ,  Yoosang Hwang

IPC: H10B12/00 ,  H01L27/108 ,  H01L23/528

CPC classification number: H10B12/315 ,  H01L23/5283 ,  H10B12/053 ,  H10B12/34 ,  H10B12/482 ,  H10B12/485 ,  H10B12/488

Abstract: A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.

公开(公告)号：US20230232618A1

公开(公告)日：2023-07-20

申请号：US18123736

申请日：2023-03-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyosub Kim ,  Keunnam Kim ,  Dongoh Kim ,  Bongsoo Kim ,  Euna Kim ,  Chansic Yoon ,  Kiseok Lee ,  Hyeonok Jung ,  Sunghee Han ,  Yoosang Hwang

IPC: H10B12/00

CPC classification number: H10B12/488 ,  H10B12/34 ,  H10B12/053 ,  H10B12/315 ,  H10B12/482

Abstract: A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.

公开(公告)号：US20210066305A1

公开(公告)日：2021-03-04

申请号：US16896470

申请日：2020-06-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyosub Kim ,  Keunnam Kim ,  Dongoh Kim ,  Bongsoo Kim ,  Euna Kim ,  Chansic Yoon ,  Kiseok Lee ,  Hyeonok Jung ,  Sunghee Han ,  Yoosang Hwang

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes: an active region defined by a device isolation layer formed in a substrate; a word line configured to cross the active region, the word line extending in a first direction and being formed in the substrate; a bit line extending in a second direction perpendicular to the first direction on the word line; a first contact connecting the bit line to the active region; a first mask for forming the active region, the first mask being formed on the active region; and a second mask of which a height of a top surface thereof is greater than a height of a top surface of the active region, the second mask covering the word line, wherein the active region has a bar shape that extends to form an acute angle with respect to the first direction.

公开(公告)号：US10312105B2

公开(公告)日：2019-06-04

申请号：US15598861

申请日：2017-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chan-Sic Yoon ,  Jiung Pak ,  Kiseok Lee ,  Chan Ho Park ,  Hyeonok Jung

IPC: H01L21/308 ,  H01L27/108

Abstract: A method of fabricating a semiconductor device includes forming a linear preliminary mask pattern in a first direction on a substrate. The preliminary mask pattern is patterned to provide a plurality of mask patterns that are aligned end-to-end with one another on the substrate and are separated by an exposed portion of the substrate between respective facing ends of the plurality of mask patterns. An auxiliary layer is formed to cover at least sidewalls of the facing ends to reduce a size of the exposed portion to provide a reduced exposed portion of the substrate and the reduced exposed portion of the substrate is etched to form a trench defining active patterns in the substrate aligned end-to-end with one another.