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    Reverse complement magnetic tunnel junction (MTJ) bit cells employing shared source lines, and related methods
    71.
    发明授权
    Reverse complement magnetic tunnel junction (MTJ) bit cells employing shared source lines, and related methods 有权

    公开(公告)号：US09514795B1

    公开(公告)日：2016-12-06

    申请号：US14835871

    申请日：2015-08-26

    Applicant: QUALCOMM Incorporated

    Inventor： Xia Li ,  Yu Lu ,  Xiaochun Zhu

    IPC: G11C11/00 ,  G11C11/16

    Abstract: Reverse complement MTJ bit cells employing shared source lines are disclosed. In one aspect, a 2T2MTJ reverse complement bit cell employing shared source line is provided. Bit cell includes first MTJ and second MTJ. Value of first MTJ is complement of value of second MTJ. First bit line is coupled to top layer of first MTJ, and first electrode of first access transistor is coupled to bottom layer of first MTJ. Second bit line is coupled to bottom layer of second MTJ, and first electrode of second access transistor is coupled to top layer of second MTJ. Word line is coupled to second electrode of first access transistor and second access transistor. Shared source line is coupled to third electrode of first access transistor and second access transistor. Employing shared source line allows the bit cell to be designed with reduced parasitic resistance.

    DECOUPLING OF SOURCE LINE LAYOUT FROM ACCESS TRANSISTOR CONTACT PLACEMENT IN A MAGNETIC TUNNEL JUNCTION (MTJ) MEMORY BIT CELL TO FACILITATE REDUCED CONTACT RESISTANCE
    72.
    发明申请
    DECOUPLING OF SOURCE LINE LAYOUT FROM ACCESS TRANSISTOR CONTACT PLACEMENT IN A MAGNETIC TUNNEL JUNCTION (MTJ) MEMORY BIT CELL TO FACILITATE REDUCED CONTACT RESISTANCE 有权
    来自磁通线接头（MTJ）存储器单元的访问晶体管接点放置的源线布局解耦以便于减少接触电阻

    公开(公告)号：US20160315248A1

    公开(公告)日：2016-10-27

    申请号：US14860931

    申请日：2015-09-22

    Applicant: QUALCOMM Incorporated

    Inventor： Xiaochun Zhu ,  Yu Lu ,  Chando Park ,  Seung Hyuk Kang

    IPC: H01L43/02 ,  H01L43/12 ,  H01L43/08

    CPC classification number: G11C11/1659 ,  G11C11/02 ,  G11C11/161 ,  H01L27/228

    Abstract: Magnetic tunnel junction (MTJ) memory bit cells that decouple source line layout from access transistor node size to facilitate reduced contact resistance are disclosed. In one example, an MTJ memory bit cell is provided that includes a source plate disposed above and in contact with a source contact for a source node of an access transistor. A source line is disposed above and in electrical contact with the source plate to electrically connect the source line to the source node. The source plate allows the source line to be provided in a higher metal level from the source and drain contacts of the access transistor such that the source line is not in physical contact with (i.e., decoupled from) the source contact. This allows pitch between the source line and drain column to be relaxed from the width of the source and drain nodes without having to increase contact resistance.

    Abstract translation: 公开了将源极线布局与存取晶体管节点尺寸分离以便于降低接触电阻的磁隧道结（MTJ）存储器位单元。 在一个示例中，提供MTJ存储器位单元，其包括设置在存取晶体管的源极节点的源极触点上方并与之接触的源极板。 源极线设置在源极之上并与源极电接触以将源极线电连接到源极节点。 源极板允许源极线从存取晶体管的源极和漏极触点提供在更高的金属电平，使得源极线不与源极接触物理接触（即，去耦合）。 这允许源极线和漏极列之间的间距从源极和漏极节点的宽度松弛，而不必增加接触电阻。

    Physically unclonable function based on breakdown voltage of metal-insulator-metal device
    74.
    发明授权
    Physically unclonable function based on breakdown voltage of metal-insulator-metal device 有权
    基于金属绝缘体金属器件击穿电压的物理不可克隆功能

    公开(公告)号：US09298946B2

    公开(公告)日：2016-03-29

    申请号：US14072735

    申请日：2013-11-05

    Applicant: QUALCOMM Incorporated

    Inventor： Xiaochun Zhu ,  Steven M. Millendorf ,  Xu Guo ,  David M. Jacobson ,  Kangho Lee ,  Seung H. Kang ,  Matthew Michael Nowak

    IPC: G11C17/02 ,  G06F21/70 ,  G06F1/26 ,  G11C11/16 ,  H04L9/08 ,  H04L9/32 ,  G09C1/00

    CPC classification number: G06F21/70 ,  G06F1/26 ,  G09C1/00 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1695 ,  G11C17/02 ,  G11C17/14 ,  H04L9/0866 ,  H04L9/3278 ,  H04L2209/12

    Abstract: One feature pertains to a method of implementing a physically unclonable function that includes providing an array of metal-insulator-metal (MIM) devices, where the MIM devices are configured to represent a first resistance state or a second resistance state and a plurality of the MIM devices are initially at the first resistance state. The MIM devices have a random breakdown voltage that is greater than a first voltage and less than a second voltage, where the breakdown voltage represents a voltage that causes the MIM devices to transition from the first resistance state to the second resistance state. The method further includes applying a signal line voltage to the MIM devices to cause a portion of the MIM devices to randomly breakdown and transition from the first resistance state to the second resistance state, the signal line voltage greater than the first voltage and less than the second voltage.

    Abstract translation: 一个特征涉及实现物理上不可克隆的功能的方法，其包括提供金属 - 绝缘体 - 金属（MIM）器件的阵列，其中MIM器件被配置为表示第一电阻状态或第二电阻状态，并且多个 MIM器件最初处于第一电阻状态。 MIM器件具有大于第一电压且小于第二电压的随机击穿电压，其中击穿电压表示使MIM器件从第一电阻状态转变到第二电阻状态的电压。 该方法还包括向MIM器件施加信号线电压以使MIM器件的一部分随机击穿并从第一电阻状态转变到第二电阻状态，信号线电压大于第一电压并小于 第二电压。

    REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY (STT-MRAM)
    75.
    发明申请
    REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY (STT-MRAM) 有权
    旋转扭矩传递磁阻随机存取存储器（STT-MRAM）减少源装载效应

    公开(公告)号：US20150349244A1

    公开(公告)日：2015-12-03

    申请号：US14822295

    申请日：2015-08-10

    Applicant: QUALCOMM Incorporated

    Inventor： Kangho Lee ,  Seung Kang ,  Xiaochun Zhu

    IPC: H01L43/08 ,  H01L43/12 ,  G11C11/16 ,  H01L43/02

    CPC classification number: H01L43/08 ,  G06F17/5068 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1675 ,  H01L43/02 ,  H01L43/12

    Abstract: A memory cell includes a magnetic tunnel junction (MTJ) structure that includes a free layer coupled to a bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. The pinned layer has a physical dimension to produce an offset magnetic field corresponding to a first switching current of the MTJ structure to enable switching between the first state and the second state when a first voltage is applied from the bit line to a source line coupled to an access transistor and a second switching current to enable switching between the second state and the first state when the first voltage is applied from the source line to the bit line.

    Abstract translation: 存储单元包括磁隧道结（MTJ）结构，其包括耦合到位线和被钉扎层的自由层。 自由层的磁矩基本上平行于处于第一状态的被钉扎层的磁矩，并且在第二状态下基本上与销钉层的磁矩反平行。 固定层具有物理尺寸以产生对应于MTJ结构的第一开关电流的偏移磁场，以便当第一电压从位线施加到耦合到第一状态的源极线时，能够在第一状态和第二状态之间切换 存取晶体管和第二开关电流，以便当第一电压从源极线施加到位线时，能够在第二状态和第一状态之间切换。

    PHYSICALLY UNCLONABLE FUNCTION BASED ON RESISTIVITY OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY MAGNETIC TUNNEL JUNCTIONS
    78.
    发明申请
    PHYSICALLY UNCLONABLE FUNCTION BASED ON RESISTIVITY OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY MAGNETIC TUNNEL JUNCTIONS 审中-公开
    基于磁阻随机存取磁场隧道结的电阻的物理不可靠函数

    公开(公告)号：US20150071432A1

    公开(公告)日：2015-03-12

    申请号：US14077093

    申请日：2013-11-11

    Applicant: QUALCOMM Incorporated

    Inventor： Xiaochun Zhu ,  Steven M. Millendorf ,  Xu Guo ,  David Merrill Jacobson ,  Kangho Lee ,  Seung H. Kang ,  Matthew Michael Nowak

    IPC: G11C11/16 ,  H04L9/30

    CPC classification number: G11C11/1673 ,  G09C1/00 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/1695 ,  H04L9/0866 ,  H04L9/30 ,  H04L9/3278

    Abstract: One feature pertains to least one physically unclonable function based on an array of magnetoresistive random-access memory (MRAM) cells. A challenge to the array of MRAM cells may identify some of the cells to be used for the physically unclonable function. Each MRAM cell may include a plurality of magnetic tunnel junctions (MTJs), where the MTJs may exhibit distinct resistances due to manufacturing or fabrication variations. A response to the challenge may be obtained for each cell by using the resistance(s) of one or both of the MTJs for a cell to obtain a value that serves as the response for that cell. The responses for a plurality of cells may be at least partially mapped to provide a unique identifier for the array. The responses generated from the array of cells may serve as a physically unclonable function that may be used to uniquely identify an electronic device.

    Abstract translation: 一个特征涉及基于磁阻随机存取存储器（MRAM）单元阵列的至少一个物理上不可克隆的功能。 对MRAM单元阵列的挑战可能会识别要用于物理不可克隆功能的一些单元格。 每个MRAM单元可以包括多个磁隧道结（MTJ），其中MTJ可能由于制造或制造变化而呈现出不同的电阻。 可以通过使用用于单元的MTJ中的一个或两个的电阻来获得用作该单元的响应的值，为每个单元获得对该挑战的响应。 可以至少部分地映射多个小区的响应以提供阵列的唯一标识符。 从单元阵列产生的响应可以用作可以用于唯一地识别电子设备的物理上不可克隆的功能。

    MRAM SENSING WITH MAGNETICALLY ANNEALED REFERENCE CELL
    79.
    发明申请
    MRAM SENSING WITH MAGNETICALLY ANNEALED REFERENCE CELL 有权
    MRAM用MAGNETICALLY ANNEALED参考电池感测

    公开(公告)号：US20140126284A1

    公开(公告)日：2014-05-08

    申请号：US14156541

    申请日：2014-01-16

    Applicant: QUALCOMM Incorporated

    Inventor： Hari M. Rao ,  Xiaochun Zhu

    IPC: G11C11/16 ,  H01L43/12

    CPC classification number: G11C11/1673 ,  G11C7/14 ,  G11C11/16 ,  G11C11/1659 ,  G11C13/004 ,  H01L43/12 ,  Y10T29/49117

    Abstract: Systems and method for reading/sensing data stored in magnetoresistive random access memory (MRAM) cells using magnetically annealed reference cells. A MRAM includes a reference circuit comprising at least one magnetic storage cell, wherein each magnetic storage cell in the MRAM is programmed to the same state. The reference circuit includes a load element coupled to the magnetic storage cell, wherein the load element is configured to establish a reference voltage during a read operation.

    Abstract translation: 使用磁退火参考单元读取/感测存储在磁阻随机存取存储器（MRAM）单元中的数据的系统和方法。 MRAM包括包括至少一个磁存储单元的参考电路，其中MRAM中的每个磁存储单元被编程为相同的状态。 参考电路包括耦合到磁存储单元的负载元件，其中负载元件被配置为在读取操作期间建立参考电压。

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