公开(公告)号：US20160225817A1

公开(公告)日：2016-08-04

申请号：US14609169

申请日：2015-01-29

Applicant: QUALCOMM Incorporated

Inventor： Vladimir Machkaoutsan ,  Matthias Georg Gottwald ,  Mustafa Badaroglu ,  Jimmy Kan ,  Kangho Lee ,  Yu Lu ,  Chando Park

IPC: H01L27/22 ,  H01L43/08 ,  H01L43/12 ,  H01L43/02

CPC classification number: H01L43/12 ,  H01L27/222 ,  H01L27/228 ,  H01L43/02 ,  H01L43/08

Abstract: A semiconductor device includes a first magnetic tunnel junction (MTJ) device, a second MTJ device, and a top electrode. The first MTJ device includes a barrier layer. The second MTJ device includes the barrier layer. The top electrode is coupled to the first MTJ device and the second MTJ device.

Abstract translation: 半导体器件包括第一磁性隧道结（MTJ）器件，第二MTJ器件和顶部电极。 第一MTJ装置包括阻挡层。 第二MTJ装置包括阻挡层。 顶部电极耦合到第一MTJ装置和第二MTJ装置。

公开(公告)号：US09385309B2

公开(公告)日：2016-07-05

申请号：US14334015

申请日：2014-07-17

Applicant: QUALCOMM Incorporated

Inventor： Matthias Georg Gottwald ,  Jimmy Kan ,  Kangho Lee ,  Chando Park ,  Seung Hyuk Kang

IPC: H01L29/82 ,  H01L43/12 ,  H01L43/08 ,  G11C11/16 ,  H01L43/10 ,  H01L27/22

CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L27/222 ,  H01L27/228 ,  H01L43/08 ,  H01L43/10

Abstract: A method for fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes growing a seed layer on a first electrode of the pMTJ device. The seed layer has a uniform predetermined crystal orientation along a growth axis. The method also includes planarizing the seed layer while maintaining the uniform predetermined crystal orientation of the seed layer.

Abstract translation: 用于制造垂直磁性隧道结（pMTJ）器件的方法包括在pMTJ器件的第一电极上生长晶种层。 种子层沿生长轴具有均匀的预定晶体取向。 该方法还包括平面化种子层，同时保持种子层的均匀的预定晶体取向。

公开(公告)号：US20160155931A1

公开(公告)日：2016-06-02

申请号：US14558103

申请日：2014-12-02

Applicant: QUALCOMM Incorporated

Inventor： Kangho Lee ,  Chando Park ,  Jimmy Kan ,  Matthias Georg Gottwald ,  Xiaochun Zhu ,  Seung Hyuk Kang

IPC: H01L43/08 ,  H01L43/12 ,  H01L43/02

CPC classification number: H01L43/08 ,  H01L43/12

Abstract: An apparatus includes a capping layer disposed on top of a free layer. The apparatus also includes a magnetic etch stop layer disposed on top of the capping layer. The capping layer and the magnetic etch stop layer are included in a spin-transfer torque magnetoresistive random access memory (STT-MRAM) magnetic tunnel junction (MTJ) device.

Abstract translation: 一种装置包括设置在自由层顶部的覆盖层。 该设备还包括设置在覆盖层顶部上的磁性蚀刻停止层。 覆盖层和磁蚀刻停止层包括在自旋传递转矩磁阻随机存取存储器（STT-MRAM）磁隧道结（MTJ）装置中。

公开(公告)号：US09298946B2

公开(公告)日：2016-03-29

申请号：US14072735

申请日：2013-11-05

Applicant: QUALCOMM Incorporated

Inventor： Xiaochun Zhu ,  Steven M. Millendorf ,  Xu Guo ,  David M. Jacobson ,  Kangho Lee ,  Seung H. Kang ,  Matthew Michael Nowak

IPC: G11C17/02 ,  G06F21/70 ,  G06F1/26 ,  G11C11/16 ,  H04L9/08 ,  H04L9/32 ,  G09C1/00

CPC classification number: G06F21/70 ,  G06F1/26 ,  G09C1/00 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1695 ,  G11C17/02 ,  G11C17/14 ,  H04L9/0866 ,  H04L9/3278 ,  H04L2209/12

Abstract: One feature pertains to a method of implementing a physically unclonable function that includes providing an array of metal-insulator-metal (MIM) devices, where the MIM devices are configured to represent a first resistance state or a second resistance state and a plurality of the MIM devices are initially at the first resistance state. The MIM devices have a random breakdown voltage that is greater than a first voltage and less than a second voltage, where the breakdown voltage represents a voltage that causes the MIM devices to transition from the first resistance state to the second resistance state. The method further includes applying a signal line voltage to the MIM devices to cause a portion of the MIM devices to randomly breakdown and transition from the first resistance state to the second resistance state, the signal line voltage greater than the first voltage and less than the second voltage.

Abstract translation: 一个特征涉及实现物理上不可克隆的功能的方法，其包括提供金属 - 绝缘体 - 金属（MIM）器件的阵列，其中MIM器件被配置为表示第一电阻状态或第二电阻状态，并且多个 MIM器件最初处于第一电阻状态。 MIM器件具有大于第一电压且小于第二电压的随机击穿电压，其中击穿电压表示使MIM器件从第一电阻状态转变到第二电阻状态的电压。 该方法还包括向MIM器件施加信号线电压以使MIM器件的一部分随机击穿并从第一电阻状态转变到第二电阻状态，信号线电压大于第一电压并小于 第二电压。

公开(公告)号：US09214624B2

公开(公告)日：2015-12-15

申请号：US13770526

申请日：2013-02-19

Applicant: QUALCOMM Incorporated

Inventor： Kangho Lee ,  Wei-Chuan Chen ,  Seung H. Kang

IPC: H01L43/08 ,  H01L43/02 ,  H01L43/12 ,  G11C11/15 ,  G11C11/16

CPC classification number: H01L43/10 ,  G11C11/15 ,  G11C11/16 ,  G11C11/161 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A perpendicular magnetic tunnel junction (MTJ) apparatus includes a tunnel magnetoresistance (TMR) enhancement buffer layer deposited between the tunnel barrier layer and the reference layers An amorphous alloy spacer is deposited between the TMR enhancement buffer layer and the reference layers to enhance TMR The amorphous alloy spacer blocks template effects of face centered cubic (fcc) oriented pinned layers and provides strong coupling between the pinned layers and the TMR enhancement buffer layer to ensure full perpendicular magnetization.

Abstract translation: 垂直磁隧道结（MTJ）装置包括沉积在隧道势垒层和参考层之间的隧道磁阻（TMR）增强缓冲层。在TMR增强缓冲层和参考层之间沉积非晶合金间隔物以增强TMR非晶态 合金间隔块阻挡面心立方（fcc）取向钉扎层的模板效应，并且在钉扎层和TMR增强缓冲层之间提供强耦合，以确保完全垂直磁化。

公开(公告)号：US20150349244A1

公开(公告)日：2015-12-03

申请号：US14822295

申请日：2015-08-10

Applicant: QUALCOMM Incorporated

Inventor： Kangho Lee ,  Seung Kang ,  Xiaochun Zhu

IPC: H01L43/08 ,  H01L43/12 ,  G11C11/16 ,  H01L43/02

CPC classification number: H01L43/08 ,  G06F17/5068 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1675 ,  H01L43/02 ,  H01L43/12

Abstract: A memory cell includes a magnetic tunnel junction (MTJ) structure that includes a free layer coupled to a bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. The pinned layer has a physical dimension to produce an offset magnetic field corresponding to a first switching current of the MTJ structure to enable switching between the first state and the second state when a first voltage is applied from the bit line to a source line coupled to an access transistor and a second switching current to enable switching between the second state and the first state when the first voltage is applied from the source line to the bit line.

Abstract translation: 存储单元包括磁隧道结（MTJ）结构，其包括耦合到位线和被钉扎层的自由层。 自由层的磁矩基本上平行于处于第一状态的被钉扎层的磁矩，并且在第二状态下基本上与销钉层的磁矩反平行。 固定层具有物理尺寸以产生对应于MTJ结构的第一开关电流的偏移磁场，以便当第一电压从位线施加到耦合到第一状态的源极线时，能够在第一状态和第二状态之间切换 存取晶体管和第二开关电流，以便当第一电压从源极线施加到位线时，能够在第二状态和第一状态之间切换。

公开(公告)号：US09043740B2

公开(公告)日：2015-05-26

申请号：US14048918

申请日：2013-10-08

Applicant: QUALCOMM Incorporated

Inventor： Kangho Lee ,  Xiaochun Zhu ,  Xia Li ,  Seung Hyuk Kang

IPC: G06F17/50 ,  H01L43/02 ,  B82Y25/00 ,  B82Y40/00 ,  H01F10/32 ,  H01F41/30 ,  H01F41/32 ,  H01L43/08 ,  H01L43/12 ,  H01L27/22

CPC classification number: H01L43/02 ,  B82Y25/00 ,  B82Y40/00 ,  G06F17/5068 ,  H01F10/3254 ,  H01F10/329 ,  H01F41/309 ,  H01F41/32 ,  H01L27/228 ,  H01L43/08 ,  H01L43/12

Abstract: A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, a non-transitory computer-readable medium includes processor executable instructions. The instructions, when executed by a processor, cause the processor to initiate deposition of a capping material on a free layer of a magnetic tunneling junction structure to form a capping layer. The instructions, when executed by the processor, cause the processor to initiate oxidization of a first layer of the capping material to form a first oxidized layer of oxidized material.

Abstract translation: 公开了一种磁性隧道接合装置及其制造方法。 在特定实施例中，非暂时计算机可读介质包括处理器可执行指令。 当处理器执行时，指令使处理器开始在磁隧道结结构的自由层上沉积封盖材料以形成覆盖层。 所述指令在由所述处理器执行时使得所述处理器开始所述封盖材料的第一层的氧化以形成氧化材料的第一氧化层。

公开(公告)号：US20150071432A1

公开(公告)日：2015-03-12

申请号：US14077093

申请日：2013-11-11

Applicant: QUALCOMM Incorporated

Inventor： Xiaochun Zhu ,  Steven M. Millendorf ,  Xu Guo ,  David Merrill Jacobson ,  Kangho Lee ,  Seung H. Kang ,  Matthew Michael Nowak

IPC: G11C11/16 ,  H04L9/30

CPC classification number: G11C11/1673 ,  G09C1/00 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/1695 ,  H04L9/0866 ,  H04L9/30 ,  H04L9/3278

Abstract: One feature pertains to least one physically unclonable function based on an array of magnetoresistive random-access memory (MRAM) cells. A challenge to the array of MRAM cells may identify some of the cells to be used for the physically unclonable function. Each MRAM cell may include a plurality of magnetic tunnel junctions (MTJs), where the MTJs may exhibit distinct resistances due to manufacturing or fabrication variations. A response to the challenge may be obtained for each cell by using the resistance(s) of one or both of the MTJs for a cell to obtain a value that serves as the response for that cell. The responses for a plurality of cells may be at least partially mapped to provide a unique identifier for the array. The responses generated from the array of cells may serve as a physically unclonable function that may be used to uniquely identify an electronic device.

Abstract translation: 一个特征涉及基于磁阻随机存取存储器（MRAM）单元阵列的至少一个物理上不可克隆的功能。 对MRAM单元阵列的挑战可能会识别要用于物理不可克隆功能的一些单元格。 每个MRAM单元可以包括多个磁隧道结（MTJ），其中MTJ可能由于制造或制造变化而呈现出不同的电阻。 可以通过使用用于单元的MTJ中的一个或两个的电阻来获得用作该单元的响应的值，为每个单元获得对该挑战的响应。 可以至少部分地映射多个小区的响应以提供阵列的唯一标识符。 从单元阵列产生的响应可以用作可以用于唯一地识别电子设备的物理上不可克隆的功能。

公开(公告)号：US20140254251A1

公开(公告)日：2014-09-11

申请号：US13787938

申请日：2013-03-07

Applicant: QUALCOMM INCORPORATED

Inventor： Kangho Lee ,  Wah Nam Hsu ,  Xiao Lu ,  Seung H. Kang

IPC: G11C29/04

CPC classification number: G11C29/04 ,  G11C7/04 ,  G11C11/16 ,  G11C29/00 ,  G11C29/56016

Abstract: In a particular embodiment, a method includes controlling a temperature within a chamber while applying a magnetic field. A device including a memory array is located in the chamber. The method includes applying a magnetic field to the memory array and testing the memory array during application of the magnetic field to the memory array at a target temperature.

Abstract translation: 在特定实施例中，一种方法包括在施加磁场的同时控制室内的温度。 包括存储器阵列的装置位于腔室中。 该方法包括在存储器阵列中施加磁场并在目标温度下将磁场施加到存储器阵列期间测试存储器阵列。

公开(公告)号：US20140015080A1

公开(公告)日：2014-01-16

申请号：US14036409

申请日：2013-09-25

Applicant: QUALCOMM Incorporated

Inventor： Seung H. Kang ,  Xia Li ,  Shiqun Gu ,  Kangho Lee ,  Xiaochun Zhu

IPC: H01L43/02 ,  H01L43/12

CPC classification number: H01L27/222 ,  H01L43/08 ,  H01L43/12

Abstract: A magnetic tunnel junction (MTJ) device for a magnetic random access memory (MRAM) includes a first conductive interconnect communicating with at least one control device and a first electrode coupling to the first conductive interconnect through a via opening formed in a dielectric passivation barrier using a first mask. The device has an MTJ stack for storing data, coupled to the first electrode. A portion of the MTJ stack has lateral dimensions based upon a second mask. The portion defined by the second mask is over the contact via. A second electrode is coupled to the MTJ stack and also has a lateral dimension defined by the second mask. The first electrode and a portion of the MTJ stack are defined by a third mask. A second conductive interconnect is coupled to the second electrode and at least one other control device.

Abstract translation: 用于磁性随机存取存储器（MRAM）的磁性隧道结（MTJ）装置包括与至少一个控制装置通信的第一导电互连和通过形成在电介质钝化屏障中的通孔连接到第一导电互连的第一电极，其使用 第一个面具。 该装置具有用于存储耦合到第一电极的数据的MTJ堆叠。 MTJ堆叠的一部分具有基于第二掩模的横向尺寸。 由第二掩模限定的部分在接触通孔之上。 第二电极耦合到MTJ堆叠并且还具有由第二掩模限定的横向尺寸。 第一电极和MTJ堆叠的一部分由第三掩模限定。 第二导电互连件耦合到第二电极和至少一个其它控制装置。