Spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy
    3.
    发明授权
    Spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy 有权
    具有电压控制各向异性的自旋轨道转矩磁阻随机存取存储器

    公开(公告)号:US09589619B2

    公开(公告)日:2017-03-07

    申请号:US14617919

    申请日:2015-02-09

    Abstract: Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example, disclosed is a three-terminal magnetic tunnel junction (MTJ) storage element that is programmed via a combination of voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT) techniques. Also disclosed is a memory controller configured to program the three-terminal MTJ storage element via VCMA and SOT techniques. The disclosed devices improve efficiency over conventional devices by using less write energy, while having a design that is simpler and more scalable than conventional devices. The disclosed devices also have increased thermal stability without increasing required switching current, as critical switching current between states is essentially the same.

    Abstract translation: 公开了具有电压控制各向异性的自旋轨道转矩磁阻随机存取存储器的方法和装置。 在一个实例中,公开了通过压控磁各向异性(VCMA)和自旋 - 轨道转矩(SOT)技术的组合来编程的三端磁隧道结(MTJ)存储元件。 还公开了一种被配置为经由VCMA和SOT技术对三端MTJ存储元件进行编程的存储器控​​制器。 所公开的设备通过使用较少的写入能量来提高与传统设备的效率,同时具有比常规设备更简单和更可扩展的设计。 所公开的装置还具有增加的热稳定性,而不增加所需的开关电流,因为状态之间的关键开关电流基本相同。

    Reducing source loading effect in spin torque transfer magnetoresistive random access memory (STT-MRAM)
    4.
    发明授权
    Reducing source loading effect in spin torque transfer magnetoresistive random access memory (STT-MRAM) 有权
    降低自旋转矩磁阻随机存取存储器(STT-MRAM)中的源负载效应

    公开(公告)号:US09368715B2

    公开(公告)日:2016-06-14

    申请号:US14822295

    申请日:2015-08-10

    Abstract: A memory cell includes a magnetic tunnel junction (MTJ) structure that includes a free layer coupled to a bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. The pinned layer has a physical dimension to produce an offset magnetic field corresponding to a first switching current of the MTJ structure to enable switching between the first state and the second state when a first voltage is applied from the bit line to a source line coupled to an access transistor and a second switching current to enable switching between the second state and the first state when the first voltage is applied from the source line to the bit line.

    Abstract translation: 存储单元包括磁隧道结(MTJ)结构,其包括耦合到位线和被钉扎层的自由层。 自由层的磁矩基本上平行于处于第一状态的被钉扎层的磁矩,并且在第二状态下基本上与销钉层的磁矩反平行。 固定层具有物理尺寸以产生对应于MTJ结构的第一开关电流的偏移磁场,以便当第一电压从位线施加到耦合到第一状态的源极线时,能够在第一状态和第二状态之间切换 存取晶体管和第二开关电流,以便当第一电压从源极线施加到位线时,能够在第二状态和第一状态之间切换。

    PHYSICALLY UNCLONABLE FUNCTION BASED ON THE RANDOM LOGICAL STATE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY
    6.
    发明申请
    PHYSICALLY UNCLONABLE FUNCTION BASED ON THE RANDOM LOGICAL STATE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY 有权
    基于随机随机存取存储器的随机逻辑状态的物理不可靠函数

    公开(公告)号:US20150071431A1

    公开(公告)日:2015-03-12

    申请号:US14072634

    申请日:2013-11-05

    Abstract: One feature pertains to a method of implementing a physically unclonable function (PUF). The method includes exposing an array of magnetoresistive random access memory (MRAM) cells to an orthogonal external magnetic field. The MRAM cells are each configured to represent one of a first logical state and a second logical state, and the orthogonal external magnetic field is oriented in an orthogonal direction to an easy axis of a free layer of the MRAM cells to place the MRAM cells in a neutral logical state that is not the first logical state or the second logical state. The method further includes removing the orthogonal external magnetic field to place each of the MRAM cells of the array randomly in either the first logical state or the second logical state.

    Abstract translation: 一个特征涉及实现物理不可克隆功能(PUF)的方法。 该方法包括将磁阻随机存取存储器(MRAM)阵列阵列暴露于正交外部磁场。 MRAM单元各自被配置为表示第一逻辑状态和第二逻辑状态之一,并且正交外部磁场定向为与MRAM单元的自由层的容易轴正交的方向,以将MRAM单元置于 不是第一逻辑状态或第二逻辑状态的中性逻辑状态。 该方法还包括去除正交的外部磁场,将阵列的每个MRAM单元随机地置于第一逻辑状态或第二逻辑状态中。

    PHYSICALLY UNCLONABLE FUNCTION BASED ON THE INITIAL LOGICAL STATE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY
    7.
    发明申请
    PHYSICALLY UNCLONABLE FUNCTION BASED ON THE INITIAL LOGICAL STATE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY 有权
    基于磁性随机存取存储器的初始逻辑状态的物理不可靠函数

    公开(公告)号:US20150071430A1

    公开(公告)日:2015-03-12

    申请号:US14072599

    申请日:2013-11-05

    Abstract: One feature pertains to a method for implementing a physically unclonable function (PUF). The method includes providing an array of magnetoresistive random access memory (MRAM) cells, where the MRAM cells are each configured to represent one of a first logical state and a second logical state. The array of MRAM cells are un-annealed and free from exposure to an external magnetic field oriented in a direction configured to initialize the MRAM cells to a single logical state of the first and second logical states. Consequently, each MRAM cell has a random initial logical state of the first and second logical states. The method further includes sending a challenge to the MRAM cell array that reads logical states of select MRAM cells of the array, and obtaining a response to the challenge from the MRAM cell array that includes the logical states of the selected MRAM cells of the array.

    Abstract translation: 一个特征涉及用于实现物理不可克隆功能(PUF)的方法。 该方法包括提供磁阻随机存取存储器(MRAM)单元阵列,其中MRAM单元被配置为表示第一逻辑状态和第二逻辑状态之一。 MRAM单元的阵列是未退火的,并且没有暴露于被配置为将MRAM单元初始化的方向定向到第一和第二逻辑状态的单个逻辑状态的外部磁场。 因此,每个MRAM单元具有第一和第二逻辑状态的随机初始逻辑状态。 该方法还包括向MRAM单元阵列发送挑战,该MRAM单元阵列读取阵列的选择MRAM单元的逻辑状态,以及从包括阵列的所选MRAM单元的逻辑状态的MRAM单元阵列获得对挑战的响应。

    Magnetic tunnel junction device
    8.
    发明授权
    Magnetic tunnel junction device 有权
    磁隧道连接装置

    公开(公告)号:US08969984B2

    公开(公告)日:2015-03-03

    申请号:US14048704

    申请日:2013-10-08

    CPC classification number: H01L43/02 H01L27/222 H01L43/08 H01L43/10 H01L43/12

    Abstract: A magnetic tunnel junction device includes a Synthetic Anti-Ferromagnetic (SAF) layer, a first free layer, and second free layer. The magnetic tunnel junction device further includes a spacer layer between the first and second free layers. The first free layer is magneto-statically coupled to the second free layer. A thickness of the spacer layer is at least 4 Angstroms.

    Abstract translation: 磁性隧道结装置包括合成反铁磁(SAF)层,第一自由层和第二自由层。 磁性隧道结装置还包括在第一和第二自由层之间的间隔层。 第一自由层被磁静态耦合到第二自由层。 间隔层的厚度至少为4埃。

    MAGNETIC AUTOMATIC TESTING EQUIPMENT (ATE) MEMORY TESTER
    10.
    发明申请
    MAGNETIC AUTOMATIC TESTING EQUIPMENT (ATE) MEMORY TESTER 审中-公开
    磁性自动测试设备(ATE)存储器测试仪

    公开(公告)号:US20140139209A1

    公开(公告)日:2014-05-22

    申请号:US13680432

    申请日:2012-11-19

    CPC classification number: G01R33/02 G11C11/16 G11C29/56016

    Abstract: Several novel features pertain to an automatic testing equipment (ATE) memory tester that includes a load board, a projected-field electromagnet, a positioning mechanism and a memory tester. The load board is for coupling to a die package that includes a magnetoresistive random access memory (MRAM) having several cells, where each cell includes a magnetic tunnel junction (MTJ). The projected-field electromagnet is for applying a portion of a magnetic field across the MRAM. The portion of the magnetic field may be substantially uniform. The positioning mechanism is coupled to the electromagnet and the load board, and is configured to position the electromagnet vertically about (above/below) the die package when the die package is coupled to the load board. The memory tester is coupled to the load board. The memory tester is for testing the MRAM when the substantially uniform portion of the magnetic field is applied across the MRAM.

    Abstract translation: 一些新颖的功能涉及自动测试设备(ATE)存储器测试器,其包括负载板,投射场电磁体,定位机构和存储器测试器。 负载板用于耦合到包括具有几个电池的磁阻随机存取存储器(MRAM)的管芯封装,其中每个电池包括磁性隧道结(MTJ)。 投射场电磁铁用于在MRAM上施加磁场的一部分。 磁场的部分可以是基本均匀的。 定位机构联接到电磁体和负载板,并且被配置为当模具封装耦合到负载板时,将电磁铁垂直地围绕模具封装(上/下)定位。 存储器测试器耦合到负载板。 当磁场的基本上均匀的部分被施加在MRAM上时,存储器测试器用于测试MRAM。

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