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公开(公告)号:US20180019189A1
公开(公告)日:2018-01-18
申请号:US15711641
申请日:2017-09-21
IPC分类号: H01L23/495 , H01L21/48 , H01L23/00
CPC分类号: H01L23/49555 , H01L21/4842 , H01L21/561 , H01L23/3107 , H01L23/49503 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/83 , H01L24/85 , H01L24/97 , H01L2224/05553 , H01L2224/05639 , H01L2224/0603 , H01L2224/29101 , H01L2224/29339 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4813 , H01L2224/48247 , H01L2224/4846 , H01L2224/48472 , H01L2224/4903 , H01L2224/49113 , H01L2224/73265 , H01L2224/78313 , H01L2224/7855 , H01L2224/78704 , H01L2224/7898 , H01L2224/83192 , H01L2224/83801 , H01L2224/85181 , H01L2224/85205 , H01L2224/92247 , H01L2924/00014 , H01L2924/181 , H01L2224/05599 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/85399
摘要: A semiconductor device manufacturing method which enhances the reliability of a semiconductor device. The method includes a step in which a source wire is connected with a semiconductor chip while jigs are pressed against a die pad. The jigs each have a first support portion with a first projection and a second support portion with a second projection. Using the jigs thus structured, the first projection is made to contact with a first point on the front surface of the die pad and then the second projection is made to contact with a second point on the front surface of the die pad located closer to a suspension lead than the first point.
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公开(公告)号:US20180005925A1
公开(公告)日:2018-01-04
申请号:US15198111
申请日:2016-06-30
发明人: CHEE SENG FOONG
IPC分类号: H01L23/495 , H01L21/56 , H01L23/31 , H01L21/48
CPC分类号: H01L23/49555 , H01L21/4825 , H01L21/4842 , H01L21/565 , H01L23/3107 , H01L23/3114 , H01L23/49503 , H01L23/4952 , H01L23/49551 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要: A method of making a packaged integrated circuit device includes forming a lead frame with leads that have an inner portion and an outer portion, the inner portion of the lead is between a periphery of a die pad and extends to one end of openings around the die pad. The outer portion of the leads are separated along their length almost up to an opposite end of the openings. Leads in a first subset of the leads alternate with leads in a second subset of the leads. The inner portion of the first subset of the leads is bent. The die pad, the inner portion of the leads, and only a first portion of the openings adjacent the inner portion of the leads are encapsulated. A second portion of the openings and the output portions of the leads form a dam bar for the encapsulating material.
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公开(公告)号:US20180005845A1
公开(公告)日:2018-01-04
申请号:US15489775
申请日:2017-04-18
发明人: Hiroaki TANOUE , Kei GOTO
IPC分类号: H01L21/48 , H01L23/31 , H01L23/495
CPC分类号: H01L21/4839 , H01L23/3114 , H01L23/49513 , H01L23/4952 , H01L23/49555 , H01L23/49582 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要: A packing method for a semiconductor device includes a step of preparing the semiconductor device that has a sealing body having a principal surface and a plurality of leads, and a step of preparing a base carrier tape that has a peripheral portion, a step portion, and a pocket portion. The method further includes a step of placing the semiconductor device in the pocket portion, a step of bonding a cover tape to the step portion in such a manner that the sealing body is pressed against the base carrier tape, and a step of winding the base carrier tape with the semiconductor device placed therein and with the cover tape bonded thereto, around a tape reel. The base carrier tape includes a principal surface of the peripheral portion, a principal surface of the step portion, and a principal surface of the pocket portion.
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公开(公告)号:US09859257B2
公开(公告)日:2018-01-02
申请号:US15358380
申请日:2016-11-22
申请人: Invensas Corporation
发明人: Javier A. Delacruz , Belgacem Haba , Tu Tam Vu , Rajesh Katkar
IPC分类号: H01L23/495 , H01L21/00 , H01L25/065 , H01L25/10 , H01L23/31 , H01L23/00 , H01L23/498
CPC分类号: H01L25/0657 , H01L23/3107 , H01L23/49541 , H01L23/49551 , H01L23/49555 , H01L23/49575 , H01L23/49838 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L2224/2919 , H01L2224/29191 , H01L2224/32145 , H01L2224/32245 , H01L2224/33181 , H01L2224/48011 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/49051 , H01L2224/4909 , H01L2224/49113 , H01L2224/49173 , H01L2224/73215 , H01L2224/73265 , H01L2224/8385 , H01L2224/85181 , H01L2224/85186 , H01L2224/97 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2225/06582 , H01L2924/00014 , H01L2924/181 , H01L2224/45015 , H01L2924/207 , H01L2224/45099 , H01L2924/00012 , H01L2924/0665 , H01L2924/07025 , H01L2924/06 , H01L2224/83 , H01L2224/85 , H01L2924/00 , H01L2224/05599 , H01L2224/85399
摘要: Stacked microelectronic packages comprise microelectronic elements each having a contact-bearing front surface and edge surfaces extending away therefrom, and a dielectric encapsulation region contacting an edge surface. The encapsulation defines first and second major surfaces of the package and a remote surface between the major surfaces. Package contacts at the remote surface include a first set of contacts at positions closer to the first major surface than a second set of contacts, which instead are at positions closer to the second major surface. The packages are configured such that major surfaces of each package can be oriented in a nonparallel direction with the major surface of a substrate, the package contacts electrically coupled to corresponding contacts at the substrate surface. The package stacking and orientation can provide increased packing density.
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公开(公告)号:US09847283B1
公开(公告)日:2017-12-19
申请号:US15344564
申请日:2016-11-06
申请人: Nexperia B.V.
发明人: Xue Ke , Kan Wae Lam , Sven Walczyk , Wai Keung Ho , Wing Onn Chaw
IPC分类号: H01L23/495 , H01L21/48 , H01L23/00 , H01L23/498
CPC分类号: H01L23/49555 , H01L21/4825 , H01L21/4842 , H01L21/561 , H01L23/3107 , H01L23/4951 , H01L23/49548 , H01L23/49582 , H01L23/49805 , H01L24/48 , H01L2224/48245 , H01L2224/48479 , H01L2224/97 , H01L2924/181 , H01L2924/3841 , H01L2224/48471 , H01L2924/00012
摘要: A semiconductor device has wettable corner leads. A semiconductor die is mounted on a lead frame. Die bonding pads are electrically connected to leads of the lead frame. The die and electrical connections are encapsulated with a mold compound. The leads are exposed and flush with the corners of the device. The leads include dimples so that they are wettable, which facilitates inspection when the device is mounted on a circuit board or substrate.
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公开(公告)号:US20170345733A1
公开(公告)日:2017-11-30
申请号:US15529568
申请日:2015-01-20
发明人: Shogo SHIBATA , Maki HASEGAWA
IPC分类号: H01L23/367 , H01L23/50 , H01L25/07 , H01L25/18
CPC分类号: H01L23/3672 , H01L23/36 , H01L23/49555 , H01L23/50 , H01L23/60 , H01L25/072 , H01L25/18
摘要: A power module includes a connection terminal for external connection, the connection terminal protruding from the side surface of a package, and a dummy terminal protruding from the side surface of the package and shorter than the connection terminal. The dummy terminal is processed to have a bottom surface with an inclination. In other words, the distance between a plane containing a heat dissipation surface of the package and the dummy terminal increases toward the extremity of the dummy terminal. Accordingly, when a heat dissipation fin is attached to the heat dissipation surface, the extremity of the dummy terminal is more distant from the heat dissipation fin than the rest of the dummy terminal.
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公开(公告)号:US20170213788A1
公开(公告)日:2017-07-27
申请号:US15359611
申请日:2016-11-22
发明人: Yoshihiko SHIMANUKI
IPC分类号: H01L23/498 , H01L23/00 , H01L23/495 , H01L21/56
CPC分类号: H01L23/49861 , H01L21/561 , H01L21/565 , H01L23/3107 , H01L23/49513 , H01L23/49548 , H01L23/49555 , H01L23/49582 , H01L23/49838 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/97 , H01L2224/05554 , H01L2224/05624 , H01L2224/05647 , H01L2224/2929 , H01L2224/29339 , H01L2224/29347 , H01L2224/32245 , H01L2224/32257 , H01L2224/45015 , H01L2224/45147 , H01L2224/4554 , H01L2224/4809 , H01L2224/48091 , H01L2224/48095 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/48479 , H01L2224/49171 , H01L2224/73265 , H01L2224/83101 , H01L2224/83862 , H01L2224/85051 , H01L2224/85186 , H01L2224/85423 , H01L2224/85447 , H01L2224/92247 , H01L2924/00014 , H01L2924/10253 , H01L2924/181 , H01L2924/18301 , H01L2924/20753 , H01L2924/3511 , H01L2924/00012 , H01L2924/0665 , H01L2924/00
摘要: A semiconductor device includes a die pad, a semiconductor chip with a bonding pad being formed, a lead one end of which is located in the vicinity of the semiconductor chip, a coupling wire that connects an electrode and the lead, and a sealing body that seals the semiconductor chip, the coupling wire, a part of the lead, and a part of the die pad. A lower surface of the die pad is exposed from a lower surface of the sealing body, the die pad and the coupling wire are comprised of copper, and a thickness of the semiconductor chip is larger than the sum of a thickness of the die pad and a thickness from an upper surface of the semiconductor chip to an upper surface of the sealing body.
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公开(公告)号:US09698083B2
公开(公告)日:2017-07-04
申请号:US14727554
申请日:2015-06-01
CPC分类号: H01L23/49531 , H01L21/56 , H01L23/3107 , H01L23/495 , H01L23/49555 , H01L23/49589 , H01L25/16 , H01L2224/48091 , H01L2224/48247 , H01L2924/181 , H05K1/18 , H05K3/3426 , H05K2201/10515 , H05K2201/10522 , H05K2201/1053 , H05K2201/10689 , H05K2201/10765 , H05K2201/10772 , H05K2201/10962 , Y02P70/613 , Y10T29/4913 , H01L2924/00012 , H01L2924/00014
摘要: An electronic device comprising a package comprising an encapsulated electronic chip, at least one at least partially exposed electrically conductive carrier lead for mounting the package on and electrically connecting the electronic chip to a carrier, and at least one at least partially exposed electrically conductive connection lead, and an electronic member stacked with the package so as to be mounted on and electrically connected to the package by the at least one connection lead.
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公开(公告)号:US20170179009A1
公开(公告)日:2017-06-22
申请号:US15376756
申请日:2016-12-13
发明人: Ralf Otremba , Felix Grawert , Amirul Afiq Hud , Uwe Kirchner , Teck Sim Lee , Guenther Lohmann , Hwee Yin Low , Edward Fuergut , Bernd Schmoelzer , Fabian Schnoy , Franz Stueckler
IPC分类号: H01L23/495 , H01L23/31
CPC分类号: H01L23/49568 , H01L23/3121 , H01L23/36 , H01L23/4334 , H01L23/49503 , H01L23/4952 , H01L23/49524 , H01L23/49551 , H01L23/49555 , H01L23/49558 , H01L23/49575 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/04042 , H01L2224/40247 , H01L2224/45015 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/4903 , H01L2924/10272 , H01L2924/13091 , H01L2924/181 , H01L2924/19107 , H01L2924/00014 , H01L2924/2076 , H01L2924/00012
摘要: A device may include a carrier, a semiconductor chip arranged over a first surface of the carrier, and an encapsulation body comprising six side surfaces and encapsulating the semiconductor chip. A second surface of the carrier opposite to the first surface of the carrier is exposed from the encapsulation body. The device may further include electrical contact elements electrically coupled to the semiconductor chip and protruding out of the encapsulation body exclusively through two opposing side surfaces of the encapsulation body which have the smallest surface areas of all the side surfaces of the encapsulation body, and an electrically insulating layer arranged over the exposed second surface of the carrier.
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公开(公告)号:US09653389B2
公开(公告)日:2017-05-16
申请号:US15237310
申请日:2016-08-15
申请人: ROHM CO., LTD.
发明人: Kenichi Yoshimochi
IPC分类号: H01L23/495 , H05K7/14 , H01L23/31 , H01L25/11 , H01L25/07 , H01L29/78 , H01L23/498 , H01L23/00
CPC分类号: H01L23/49575 , H01L23/3107 , H01L23/4951 , H01L23/49513 , H01L23/49537 , H01L23/49551 , H01L23/49555 , H01L23/49562 , H01L23/49805 , H01L24/29 , H01L24/30 , H01L24/33 , H01L24/36 , H01L24/37 , H01L24/39 , H01L24/40 , H01L24/41 , H01L25/072 , H01L25/074 , H01L25/117 , H01L29/78 , H01L2224/32245 , H01L2224/33181 , H01L2224/40245 , H01L2224/83801 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/0781 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H05K7/14 , H01L2924/00 , H01L2924/00012 , H01L2224/37099
摘要: A module (1) includes a first functional device (2) and a second functional device (3). The first functional device (2) includes a base electrode, an emitter electrode and a collector electrode. The second functional device (3) includes at least one electrode. The module (1) further includes a conductive frame (4). One of the base electrode, the emitter electrode, and the collector electrode of the first functional device (2) is directly connected to the frame (4). The electrode of the second functional device (3) is also directly connected to the frame (4). The frame (4) includes a portion serving as a terminal for external connection.
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