公开(公告)号：US10854711B2

公开(公告)日：2020-12-01

申请号：US16683604

申请日：2019-11-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Fu-Wei Yao ,  Chun Lin Tsai ,  Jiun-Lei Jerry Yu ,  Man-Ho Kwan

IPC分类号： H01L29/778 ,  H01L29/06 ,  H01L29/20 ,  H01L29/66 ,  H01L21/76 ,  H01L21/761 ,  H01L27/06 ,  H01L27/085 ,  H01L29/10 ,  H01L21/8252 ,  H01L21/8234

摘要： The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has a channel layer disposed over a substrate and including a first material. An active layer is over the channel layer and includes a second material different than the first material. An isolation structure has a horizontally extending segment that is below the channel layer and one or more vertically extending segments that are directly over the horizontally extending segment. One or more contacts extend through the channel layer and the active layer to contact the one or more vertically extending segments.

公开(公告)号：US20200335636A1

公开(公告)日：2020-10-22

申请号：US16946703

申请日：2020-07-01

申请人： Semiconductor Components Industries, LLC

发明人： Moshe Agam

IPC分类号： H01L29/808 ,  H01L27/06 ,  H01L29/66 ,  H01L29/06 ,  H01L21/8232 ,  H01L29/417 ,  H01L27/085

摘要： An electronic device can include a JFET that overlies a substrate and includes a first well region including a drain region or a source region, or both, and a second well region having the opposite the conductivity type. The second well region can be disposed within the first well region and includes a gate electrode of the JFET. Embodiments as described herein can be used to form a JFET integrated with n-channel and p-channel MISFETs without having to add an additional mask or other process operation to an existing process flow.

公开(公告)号：US10784140B2

公开(公告)日：2020-09-22

申请号：US16664758

申请日：2019-10-25

申请人： Semiconductor Components Industries, LLC

发明人： Ali Salih ,  Gordon M. Grivna

IPC分类号： H01L29/778 ,  H01L21/683 ,  H01L27/06 ,  H01L29/78 ,  H01L27/085 ,  H01L21/8258 ,  H01L21/304 ,  H01L21/306 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L29/40 ,  H01L29/417 ,  H01L29/16 ,  H01L29/20

摘要： An electronic device can include a semiconductor material and a semiconductor layer overlying the semiconductor material, wherein the semiconductor layer has a greater bandgap energy as compared to the semiconductor material. The electronic device can include a component having a high electrical field region and a low electrical field region. Within the high electrical field region, the semiconductor material is not present. In another embodiment, the component may not be present. In another aspect, a process can include providing a substrate and a semiconductor layer overlying the substrate; removing a first portion of the substrate to define a first trench; forming a first insulating layer within the first trench; removing a second portion of the substrate adjacent to first insulating layer to define second trench; and forming a second insulating layer within the second trench.

公开(公告)号：US10734377B2

公开(公告)日：2020-08-04

申请号：US15782183

申请日：2017-10-12

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Kam-Tou Sio ,  Chih-Liang Chen ,  Charles Chew-Yuen Young ,  Hui-Zhong Zhuang ,  Jiann-Tyng Tzeng ,  Yi-Hsun Chiu

IPC分类号： H01L27/02 ,  H01L27/085 ,  H01L27/118 ,  H01L27/092 ,  H01L21/8238

摘要： An integrated circuit structure includes a first well, and a first and a second set of implants. The first well includes a first dopant type, a first portion extending in a first direction and having a first width, and a second portion adjacent to the first portion. The second portion extends in the first direction and has a second width greater than the first width. The first set of implants are in the first portion of the first well, and the second set of implants are in the second portion of the first well. At least one implant of the first set of implants being configured to be coupled to a first supply voltage. Each implant of the second set of implants having a second dopant type different from a first dopant type of the first set of implants.

公开(公告)号：US10707311B2

公开(公告)日：2020-07-07

申请号：US16207113

申请日：2018-12-01

申请人： RFHIC Corporation

发明人： Won Sang Lee

IPC分类号： H01L29/40 ,  H01L29/417 ,  H01L29/778 ,  H01L29/06 ,  H01L23/00 ,  H01L27/085 ,  H01L21/768 ,  H01L23/48 ,  H01L27/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L21/8232 ,  H01L21/8252 ,  H01L21/8234

摘要： HEMT having a drain field plate is provided. The drain field plate is formed in the area between the gate and drain of a HEMT. The drain field plate includes a metal pad that has a larger projection area than the drain pad. The drain field plate and semiconductor layer disposed beneath the drain field plate form a metal-semiconductor (M-S) Schottky structure. The capacitance of the M-S Schottky structure generates capacitance in the semiconductor area, which increases the breakdown voltage of the transistor components of the HEMT. A portion of the substrate under the active area may be removed to thereby increase the heat conductivity and reduce the junction temperature of the transistor components of the HEMT.

公开(公告)号：US20200181695A1

公开(公告)日：2020-06-11

申请号：US16656470

申请日：2019-10-17

申请人： Nanomedical Diagnostics, Inc.

发明人： Pieter van Rooyen ,  Mitchell Lemer ,  Paul Hoffman

IPC分类号： C12Q1/6869 ,  B01L3/00 ,  H01L29/24 ,  G01N27/414 ,  H01L27/085 ,  H01L29/16 ,  C12Q1/6874

摘要： Provided herein are devices, systems, and methods of employing the same for the performance of bioinformatics analysis. The apparatuses and methods of the disclosure are directed in part to large scale graphene FET sensors, arrays, and integrated circuits employing the same for analyte measurements. The present GFET sensors, arrays, and integrated circuits may be fabricated using conventional CMOS processing techniques based on improved GFET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense GFET sensor based arrays. Improved fabrication techniques employing graphene as a reaction layer provide for rapid data acquisition from small sensors to large and dense arrays of sensors. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes, including DNA hybridization and/or sequencing reactions. Accordingly, GFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis within a gated reaction chamber of the GFET based sensor.

公开(公告)号：US10607989B2

公开(公告)日：2020-03-31

申请号：US16025794

申请日：2018-07-02

申请人： Agilome, Inc.

发明人： Paul Hoffman

IPC分类号： H01L29/16 ,  H01L27/085 ,  H01L29/66 ,  G01N27/414 ,  C12Q1/6874

摘要： Provided herein are integrated circuits for use in performing analyte measurements and methods of fabricating the same. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in chemical and/or biological processes, including DNA hybridization and/or sequencing reactions. The methods for fabricating the integrated circuits include steps of depositing an insulating layer on a semiconducting substrate, and forming trenches in the insulating dielectric layer. Conductive material may be deposited in the trenches to form electrodes, and the insulating layer may be conditioned so that the electrodes protrude above the insulating layer. A 2D material, such as graphene, may be deposited on to electrodes to form a channel between the electrodes.

公开(公告)号：US10601198B2

公开(公告)日：2020-03-24

申请号：US15450282

申请日：2017-03-06

申请人： THE UNIVERSITY OF CONNECTICUT ,  Opel Solar, Inc.

发明人： Geoff W. Taylor

IPC分类号： H01S5/10 ,  H01L27/144 ,  H01L33/10 ,  H01L31/0352 ,  H01S5/343 ,  G02B6/134 ,  H01S5/042 ,  H01S5/062 ,  H01S5/20 ,  H01S5/30 ,  H01L29/66 ,  H01L29/74 ,  H01L21/8252 ,  H01L29/778 ,  H01L27/06 ,  H01L27/085 ,  H01L31/111 ,  H01S5/022 ,  H01S5/125 ,  H01L29/08 ,  H01L29/15 ,  H01L29/36 ,  H01L33/06 ,  H01S5/183 ,  H01S5/187 ,  G02B6/13 ,  G02B6/293 ,  H01L31/0232 ,  H01L31/0304 ,  H01L31/11 ,  H01L31/112 ,  H01L31/18 ,  H01S5/0625 ,  H01S5/22 ,  H01L29/10

摘要： A Dual-wavelength hybrid (DWH) device includes an n-type ohmic contact layer, cathode and anode terminal electrodes, first and second injector terminal electrodes, p-type and n-type modulation doped QW structures, and first through sixth ion implant regions. The first injector terminal electrode is formed on the third ion implant region that contacts the p-type modulation doped QW structure and the second injector terminal electrode is formed on the fourth ion implant region that contacts the n-type modulation doped QW structure. The DWH device operates in at least one of a vertical cavity mode and a whispering gallery mode. In the vertical cavity mode, the DWH device converts an in-plane optical mode signal to a vertical optical mode signal, whereas in the whispering gallery mode the DWH device converts a vertical optical mode signal to an in-plane optical mode signal.

公开(公告)号：US10535763B2

公开(公告)日：2020-01-14

申请号：US16029505

申请日：2018-07-06

申请人： Transphorm Inc.

发明人： Rakesh K. Lal

IPC分类号： H01L29/778 ,  H01L29/66 ,  H01L29/417 ,  H01L27/06 ,  H01L29/40 ,  H01L27/085 ,  H01L21/8252 ,  H01L27/088 ,  H01L29/78 ,  H01L23/535 ,  H01L29/423 ,  H01L29/20 ,  H01L21/02 ,  H01L23/29 ,  H01L23/31 ,  H01L23/00 ,  H01L29/51

摘要： A III-N enhancement-mode transistor includes a III-N structure including a conductive channel, source and drain contacts, and a gate electrode between the source and drain contacts. An insulator layer is over the III-N structure, with a recess formed through the insulator layer in a gate region of the transistor, with the gate electrode at least partially in the recess. The transistor further includes a field plate having a portion between the gate electrode and the drain contact, the field plate being electrically connected to the source contact. The gate electrode includes an extending portion that is outside the recess and extends towards the drain contact. The separation between the conductive channel and the extending portion of the gate electrode is greater than the separation between the conductive channel and the portion of the field plate that is between the gate electrode and the drain contact.

公开(公告)号：US10529821B2

公开(公告)日：2020-01-07

申请号：US15997907

申请日：2018-06-05

申请人： Chih-Shu Huang

发明人： Chih-Shu Huang

IPC分类号： H01L29/66 ,  C30B25/04 ,  C30B29/40 ,  H01L21/02 ,  H01L29/778 ,  H01L29/10 ,  C30B25/18 ,  H01L29/40 ,  H01L29/423 ,  H01L27/06 ,  H01L29/872 ,  H01L29/205 ,  H01L29/207 ,  H01L21/8234 ,  H01L21/8252 ,  H01L27/085

摘要： The present invention provides an epitaxial structure of N-face group III nitride, its active device, and the method for fabricating the same. By using a fluorine-ion structure in device design, a 2DEG in the epitaxial structure of N-face group III nitride below the fluorine-ion structure will be depleted. Then the 2DEG is located at a junction between a i-GaN channel layer and a i-AlyGaN layer, and thus fabricating GaN enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs), hybrid Schottky barrier diodes (SBDs), or hybrid devices. After the fabrication step for polarity inversion, namely, generating stress in a passivation dielectric layer, the 2DEG will be raised from the junction between the i-GaN channel layer and the i-AlyGaN layer to the junction between the i-GaN channel layer and the i-AlxGaN layer.