SEMICONDUCTOR DEVICE
    22.
    发明公开

    公开(公告)号:US20240312903A1

    公开(公告)日:2024-09-19

    申请号:US18599910

    申请日:2024-03-08

    Abstract: Provided is a semiconductor device, the semiconductor device, including: a plurality of fin-type active patterns extending in a first direction on a substrate; a gate structure extending in a second direction, and crossing the plurality of fin-type active patterns; a plurality of separation structures extending in the second direction; source/drain regions disposed on the plurality of fin-type active patterns on both sides of the gate structure; an interlayer insulating layer covering the source/drain regions on the substrate; a contact structure connected to at least one of the source/drain regions; a buried conductive structure electrically connected to the contact structure in the interlayer insulating layer, and having a first width defined by a distance between adjacent separation structures among the plurality of separation structures; and a power transmission structure extending from the second surface toward the first surface of the substrate, and connected to the buried conductive structure.

    Semiconductor device
    23.
    发明授权

    公开(公告)号:US11764149B2

    公开(公告)日:2023-09-19

    申请号:US17866782

    申请日:2022-07-18

    CPC classification number: H01L23/5226 H01L23/528 H01L27/088

    Abstract: A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

    Semiconductor device
    24.
    发明授权

    公开(公告)号:US11133249B2

    公开(公告)日:2021-09-28

    申请号:US16877088

    申请日:2020-05-18

    Abstract: A semiconductor device includes a contact structure connected to an active region. A first insulating layer is disposed on a barrier dielectric layer and has a first hole connected to the contact structure. A second insulating layer is disposed on the first insulating layer and has a trench connected to the first hole. The second insulating layer has an extended portion along a side wall of the first hole. A width of the first hole less the space occupied by the extended portion is defined as a second hole. A wiring structure including a conductive material is connected to the contact structure. A conductive barrier is disposed between the conductive material and the first and second insulating layers. An etch stop layer is disposed between the first and second insulating layers and between the extended portion of the second insulating layer and a side wall of the first hole.

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