Semiconductor devices
    1.
    发明授权

    公开(公告)号:US12094941B2

    公开(公告)日:2024-09-17

    申请号:US17712726

    申请日:2022-04-04

    CPC classification number: H01L29/41791 H01L29/0649 H01L29/1033 H01L29/7851

    Abstract: A semiconductor device includes a gate structure including a gate electrode, a gate spacer layer on a side surface of the gate electrode, and a gate capping layer on the gate electrode. Moreover, the semiconductor device includes a source/drain region on at least one side of the gate structure, a contact plug on the source/drain region, and first and second insulating films between the contact plug and the gate structure and defining an air gap. The first insulating film includes a first surface, and a second surface extending from the first surface while forming a first angle. The second insulating film includes a third surface forming a second angle with the first surface of the first insulating film. The second angle is an acute angle narrower than the first angle. The air gap is defined by the first surface, the second surface, and the third surface.

    SEMICONDUCTOR DEVICES
    2.
    发明申请

    公开(公告)号:US20230080850A1

    公开(公告)日:2023-03-16

    申请号:US17712726

    申请日:2022-04-04

    Abstract: A semiconductor device includes a gate structure including a gate electrode, a gate spacer layer on a side surface of the gate electrode, and a gate capping layer on the gate electrode. Moreover, the semiconductor device includes a source/drain region on at least one side of the gate structure, a contact plug on the source/drain region, and first and second insulating films between the contact plug and the gate structure and defining an air gap. The first insulating film includes a first surface, and a second surface extending from the first surface while forming a first angle. The second insulating film includes a third surface forming a second angle with the first surface of the first insulating film. The second angle is an acute angle narrower than the first angle. The air gap is defined by the first surface, the second surface, and the third surface.

    Semiconductor device with field effect transistor

    公开(公告)号:US10332780B2

    公开(公告)日:2019-06-25

    申请号:US15828728

    申请日:2017-12-01

    Abstract: A semiconductor device includes a substrate having a first active pattern and a second active pattern, the first active pattern including a first recess region dividing an upper portion thereof into a first portion and a second portion, the second active pattern including a second recess region dividing an upper portion thereof into a first portion and a second portion, a first insulating pattern covering an inner sidewall of the first recess region, and a second insulating pattern covering an inner sidewall of the second recess region. The first insulating pattern and the second insulating pattern include the same insulating material, and a volume fraction of the first insulating pattern with respect to a volume of the first recess region is smaller than a volume fraction of the second insulating pattern with respect to a volume of the second recess region.

    SEMICONDUCTOR DEVICE
    5.
    发明公开

    公开(公告)号:US20240312903A1

    公开(公告)日:2024-09-19

    申请号:US18599910

    申请日:2024-03-08

    Abstract: Provided is a semiconductor device, the semiconductor device, including: a plurality of fin-type active patterns extending in a first direction on a substrate; a gate structure extending in a second direction, and crossing the plurality of fin-type active patterns; a plurality of separation structures extending in the second direction; source/drain regions disposed on the plurality of fin-type active patterns on both sides of the gate structure; an interlayer insulating layer covering the source/drain regions on the substrate; a contact structure connected to at least one of the source/drain regions; a buried conductive structure electrically connected to the contact structure in the interlayer insulating layer, and having a first width defined by a distance between adjacent separation structures among the plurality of separation structures; and a power transmission structure extending from the second surface toward the first surface of the substrate, and connected to the buried conductive structure.

    SEMICONDUCTOR DEVICE
    6.
    发明申请

    公开(公告)号:US20220367453A1

    公开(公告)日:2022-11-17

    申请号:US17589178

    申请日:2022-01-31

    Abstract: A semiconductor device includes active fins extending in a first direction on a substrate; an isolation insulating layer covering a portion of side surfaces of the active fins; channel layers stacked vertically and spaced apart on the active fins; a gate pattern in a second direction across the active fins and the channel layers; and spacer layers across the active fins in the second direction on both sides of the gate pattern. At least one spacer layer extends downwardly along a side surface of the gate pattern such that a lower surface thereof contacts the isolation insulating layer. The lower surface of the spacer layer is higher than a level of upper surfaces of the active fins. The gate pattern has a lower surface contacting the isolation insulating layer. The lower surface of the gate pattern is lower than a level of the upper surfaces of the active fins.

    Multi-bridge channel field effect transistor with multiple inner spacers

    公开(公告)号:US12230685B2

    公开(公告)日:2025-02-18

    申请号:US17589178

    申请日:2022-01-31

    Abstract: A semiconductor device includes active fins extending in a first direction on a substrate; an isolation insulating layer covering a portion of side surfaces of the active fins; channel layers stacked vertically and spaced apart on the active fins; a gate pattern in a second direction across the active fins and the channel layers; and spacer layers across the active fins in the second direction on both sides of the gate pattern. At least one spacer layer extends downwardly along a side surface of the gate pattern such that a lower surface thereof contacts the isolation insulating layer. The lower surface of the spacer layer is higher than a level of upper surfaces of the active fins. The gate pattern has a lower surface contacting the isolation insulating layer. The lower surface of the gate pattern is lower than a level of the upper surfaces of the active fins.

    SEMICONDUCTOR DEVICE
    9.
    发明公开

    公开(公告)号:US20240339377A1

    公开(公告)日:2024-10-10

    申请号:US18463550

    申请日:2023-09-08

    CPC classification number: H01L23/481 H01L21/76898 H01L23/5226 H01L23/53295

    Abstract: A semiconductor device includes an active region extending on a substrate in a first direction; a device isolation layer on the active region; a source/drain region on the active region; an interlayer insulating layer on the source/drain region; a stopper layer on the interlayer insulating layer; a contact structure passing through the interlayer insulating layer and the stopper layer and electrically connected to the source/drain region; and a conductive through-structure passing through the device isolation layer and the interlayer insulating layer from a lower surface of the substrate, and extending in a third direction, to contact a lower surface of the contact structure and the stopper layer, wherein the stopper layer is in contact with a portion of a side surface of the contact structure, and a lower surface of the stopper layer is lower than an upper surface of the contact structure relative to the substrate.

Patent Agency Ranking