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    Physically unclonable function based on the initial logical state of magnetoresistive random-access memory
    21.
    发明授权
    Physically unclonable function based on the initial logical state of magnetoresistive random-access memory 有权
    基于磁阻随机存取存储器的初始逻辑状态的物理不可克隆功能

    公开(公告)号：US09230630B2

    公开(公告)日：2016-01-05

    申请号：US14072599

    申请日：2013-11-05

    Applicant: QUALCOMM Incorporated

    Inventor： Xiaochun Zhu ,  Steven M. Millendorf ,  Xu Guo ,  David M. Jacobson ,  Kangho Lee ,  Seung H. Kang ,  Matthew Michael Nowak

    IPC: G11C11/16 ,  H04L9/30 ,  H04L9/08 ,  H04L9/32

    CPC classification number: G11C11/1673 ,  G09C1/00 ,  G11C11/161 ,  H04L9/0866 ,  H04L9/30 ,  H04L9/3278

    Abstract: One feature pertains to a method for implementing a physically unclonable function (PUF). The method includes providing an array of magnetoresistive random access memory (MRAM) cells, where the MRAM cells are each configured to represent one of a first logical state and a second logical state. The array of MRAM cells are un-annealed and free from exposure to an external magnetic field oriented in a direction configured to initialize the MRAM cells to a single logical state of the first and second logical states. Consequently, each MRAM cell has a random initial logical state of the first and second logical states. The method further includes sending a challenge to the MRAM cell array that reads logical states of select MRAM cells of the array, and obtaining a response to the challenge from the MRAM cell array that includes the logical states of the selected MRAM cells of the array.

    Abstract translation: 一个特征涉及用于实现物理不可克隆功能（PUF）的方法。 该方法包括提供磁阻随机存取存储器（MRAM）单元阵列，其中MRAM单元被配置为表示第一逻辑状态和第二逻辑状态之一。 MRAM单元的阵列是未退火的，并且没有暴露于被配置为将MRAM单元初始化的方向定向到第一和第二逻辑状态的单个逻辑状态的外部磁场。 因此，每个MRAM单元具有第一和第二逻辑状态的随机初始逻辑状态。 该方法还包括向MRAM单元阵列发送挑战，该MRAM单元阵列读取阵列的选择MRAM单元的逻辑状态，以及从包括阵列的所选MRAM单元的逻辑状态的MRAM单元阵列获得对挑战的响应。

    Magnetic Tunnel Junction (MTJ) on planarized electrode
    23.
    发明授权
    Magnetic Tunnel Junction (MTJ) on planarized electrode 有权
    平面电极上的磁隧道结（MTJ）

    公开(公告)号：US09082962B2

    公开(公告)日：2015-07-14

    申请号：US14086054

    申请日：2013-11-21

    Applicant: QUALCOMM Incorporated

    Inventor： Seung Hyuk Kang ,  Xia Li ,  Wei-Chuan Chen ,  Kangho Lee ,  Xiaochun Zhu ,  Wah Nam Hsu

    IPC: H01L43/12 ,  H01L43/08

    CPC classification number: H01L43/12 ,  H01L43/08

    Abstract: A magnetic tunnel junction (MTJ) with direct contact is manufactured having lower resistances, improved yield, and simpler fabrication. The lower resistances improve both read and write processes in the MTJ. The MTJ layers are deposited on a bottom electrode aligned with the bottom metal. An etch stop layer may be deposited adjacent to the bottom metal to prevent overetch of an insulator surrounding the bottom metal. The bottom electrode is planarized before deposition of the MTJ layers to provide a substantially flat surface. Additionally, an underlayer may be deposited on the bottom electrode before the MTJ layers to promote desired characteristics of the MTJ.

    Abstract translation: 具有直接接触的磁性隧道结（MTJ）被制造成具有较低的电阻，提高的产量和更简单的制造。 较低的电阻提高了MTJ中的读取和写入过程。 MTJ层沉积在与底部金属对准的底部电极上。 蚀刻停止层可以沉积在底部金属附近，以防止围绕底部金属的绝缘体的过蚀刻。 在沉积MTJ层之前将底部电极平坦化以提供基本平坦的表面。 另外，可以在MTJ层之前的底部电极上沉​​积底层以促进MTJ的期望特性。

    PHYSICALLY UNCLONABLE FUNCTION BASED ON PROGRAMMING VOLTAGE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY
    24.
    发明申请
    PHYSICALLY UNCLONABLE FUNCTION BASED ON PROGRAMMING VOLTAGE OF MAGNETORESISTIVE RANDOM-ACCESS MEMORY 有权
    基于磁阻随机存取存储器的编程电压的物理不可靠函数

    公开(公告)号：US20150070979A1

    公开(公告)日：2015-03-12

    申请号：US14072537

    申请日：2013-11-05

    Applicant: QUALCOMM Incorporated

    Inventor： Xiaochun Zhu ,  Steven M. Millendorf ,  Xu Guo ,  David M. Jacobson ,  Kangho Lee ,  Seung H. Kang ,  Matthew Michael Nowak

    IPC: G11C11/16

    CPC classification number: G11C11/1695 ,  G09C1/00 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H04L9/0866 ,  H04L9/3278 ,  H04L2209/12

    Abstract: One feature pertains to a method of implementing a physically unclonable function. The method includes initializing an array of magnetoresistive random-access memory (MRAM) cells to a first logical state, where each of the MRAM cells have a random transition voltage that is greater than a first voltage and less than a second voltage. The transition voltage represents a voltage level that causes the MRAM cells to transition from the first logical state to a second logical state. The method further includes applying a programming signal voltage to each of the MRAM cells of the array to cause at least a portion of the MRAM cells of the array to randomly change state from the first logical state to the second logical state, where the programming signal voltage is greater than the first voltage and less than the second voltage.

    Abstract translation: 一个特征涉及实现物理上不可克隆功能的方法。 该方法包括将磁阻随机存取存储器（MRAM）单元的阵列初始化为第一逻辑状态，其中每个MRAM单元具有大于第一电压且小于第二电压的随机转变电压。 转换电压表示使MRAM单元从第一逻辑状态转换到第二逻辑状态的电压电平。 该方法还包括将编程信号电压施加到阵列的每个MRAM单元，以使阵列的MRAM单元的至少一部分随机地将状态从第一逻辑状态改变到第二逻辑状态，其中编程信号 电压大于第一电压且小于第二电压。

    Magnetic random access memory (MRAM)layout with uniform pattern
    25.
    发明授权
    Magnetic random access memory (MRAM)layout with uniform pattern 有权
    具有均匀图案的磁性随机存取存储器（MRAM）布局

    公开(公告)号：US08614912B2

    公开(公告)日：2013-12-24

    申请号：US13869086

    申请日：2013-04-24

    Applicant: QUALCOMM Incorporated

    Inventor： Kangho Lee ,  Taehyun Kim ,  Xia Li ,  Jung Pill Kim ,  Seung H. Kang

    IPC: G11C11/14

    CPC classification number: G11C5/025 ,  G11C5/08 ,  G11C11/165 ,  H01L27/0207 ,  Y10T29/49117

    Abstract: A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.

    Abstract translation: 大规模存储器阵列包括统一大小的虚拟位单元和有源位单元的均匀图案。 大规模存储器阵列中的子阵列由虚拟位单元分隔开。 信号分配电路形成为具有对应于虚拟位单元的宽度或高度的宽度或高度，使得信号分配电路占据与虚拟位单元相同的覆盖区，而不会破坏整个大规模阵列上的均匀图案。 类似大小或大于标准尺寸位单元的边缘虚拟单元可以放置在大规模阵列的边缘周围，以进一步减少图案负载影响。

    REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY (STT-MRAM)
    26.
    发明申请
    REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY (STT-MRAM) 有权
    旋转扭矩传递磁阻随机存取存储器（STT-MRAM）减少源装载效应

    公开(公告)号：US20130161771A1

    公开(公告)日：2013-06-27

    申请号：US13772576

    申请日：2013-02-21

    Applicant: QUALCOMM Incorporated

    Inventor： Kangho Lee ,  Seung H. Kang ,  Xiaochun Zhu

    IPC: H01L43/02 ,  G06F17/50

    CPC classification number: H01L43/08 ,  G06F17/5068 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1675 ,  H01L43/02 ,  H01L43/12

    Abstract: An apparatus includes a memory cell including a magnetic tunnel junction (MTJ) structure coupled between a bit line and a source line. The MTJ structure includes a free layer coupled to the bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. A physical dimension of the pinned layer produces an unbalanced offset magnetic field which corresponds to a first switching current of the MTJ structure that enables switching from the first state to the second state when a first voltage is applied to the bit line and corresponds to a second switching current that enables switching from the second state to the first state when the first voltage is applied to the source line.

    Abstract translation: 一种装置包括存储单元，其包括耦合在位线和源极线之间的磁性隧道结（MTJ）结构。 MTJ结构包括耦合到位线和固定层的自由层。 自由层的磁矩基本上平行于处于第一状态的被钉扎层的磁矩，并且在第二状态下基本上与销钉层的磁矩反平行。 钉扎层的物理尺寸产生不平衡偏移磁场，其对应于MTJ结构的第一开关电流，当第一电压施加到位线并且对应于第二电压时，能够从第一状态切换到第二状态 当第一电压施加到源极线时，切换电流能够从第二状态切换到第一状态。

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