公开(公告)号：US09190322B2

公开(公告)日：2015-11-17

申请号：US14163694

申请日：2014-01-24

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Manfred Schneegans ,  Markus Heinrici

IPC: H01L21/44 ,  H01L21/768 ,  H01L23/00 ,  H01L21/027 ,  H01L23/532

CPC classification number: H01L21/7688 ,  H01L21/0272 ,  H01L21/288 ,  H01L21/76883 ,  H01L21/76885 ,  H01L23/53228 ,  H01L23/5328 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for producing a metal layer on a wafer is described. In one embodiment the method comprises providing a semiconductor wafer including a coating, printing a metal particle paste on the semiconductor wafer thereby forming a metal layer and heating the metal layer in a reductive gas for sintering the metal particle paste or for annealing a sintered metal particle paste in an oven.

Abstract translation: 对晶片上的金属层的制造方法进行说明。 在一个实施方案中，该方法包括提供包括涂层的半导体晶片，在半导体晶片上印刷金属颗粒糊料，从而形成金属层，并且在用于烧结金属颗粒糊料的还原性气体中加热金属层或者使烧结金属颗粒退火 贴在烤箱里

公开(公告)号：US10580753B2

公开(公告)日：2020-03-03

申请号：US15656388

申请日：2017-07-21

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Harald Huber ,  Michael Knabl ,  Claudia Sgiarovello ,  Caterina Travan ,  Andrew Wood

IPC: H01L23/00 ,  H01L23/525 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00

Abstract: According to an embodiment of a method of manufacturing a plurality of semiconductor devices on a wafer, the method includes forming a structure layer comprising a plurality of same semiconductor device structures and providing a protective layer on the structure layer. The protective layer on a first one of the plurality of semiconductor device structures differs from the protective layer on a second one of the plurality of semiconductor device structures.

公开(公告)号：US10269635B2

公开(公告)日：2019-04-23

申请号：US15048635

申请日：2016-02-19

Applicant: Infineon Technologies AG

Inventor： Claudia Sgiarovello ,  Martin Mischitz ,  Andrew Wood

IPC: H01L23/525 ,  H01L21/768 ,  H01L21/66 ,  H01L21/3213 ,  H01L21/67

Abstract: A method of manufacturing a wafer. The method includes providing a wafer that includes a plurality of semiconductor device structures, and testing at least one of the plurality of semiconductor device structures. Based on a test result, a liquid is provided on a selected portion of the wafer to selectively alter at least one circuit element within the at least one of the plurality of semiconductor device structures.

公开(公告)号：US09793119B2

公开(公告)日：2017-10-17

申请号：US15347835

申请日：2016-11-10

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Florian Bernsteiner

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/308 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/02

CPC classification number: H01L21/0274 ,  H01L21/02107 ,  H01L21/02203 ,  H01L21/0271 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/31058 ,  H01L21/32139 ,  H01L21/47 ,  H01L21/70

Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.

公开(公告)号：US20170271216A1

公开(公告)日：2017-09-21

申请号：US15617303

申请日：2017-06-08

Applicant: Infineon Technologies AG

Inventor： Claudia Sgiarovello ,  Martin Mischitz ,  Andrew Wood

IPC: H01L21/66 ,  H01L23/525 ,  H01L21/67 ,  H01L23/522 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L22/20 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76892 ,  H01L22/14 ,  H01L23/5252 ,  H01L23/5256

Abstract: A method of manufacturing a wafer. The method includes providing a wafer that includes a plurality of semiconductor device structures, and testing at least one of the plurality of semiconductor device structures. Based on a test result, a substance is provided on a selected portion of the wafer to selectively configure a circuit element within the at least one of the plurality of semiconductor device structures.

公开(公告)号：US09768023B1

公开(公告)日：2017-09-19

申请号：US14953492

申请日：2015-11-30

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Florian Bernsteiner

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/70 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/47

CPC classification number: H01L21/0274 ,  H01L21/02107 ,  H01L21/02203 ,  H01L21/0271 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/31058 ,  H01L21/32139 ,  H01L21/47 ,  H01L21/70

Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.

公开(公告)号：US20170243785A1

公开(公告)日：2017-08-24

申请号：US15048635

申请日：2016-02-19

Applicant: Infineon Technologies AG

Inventor： Claudia Sgiarovello ,  Martin Mischitz ,  Andrew Wood

IPC: H01L21/768 ,  H01L21/67 ,  H01L23/525 ,  H01L21/66 ,  H01L21/3213

CPC classification number: H01L21/76892 ,  H01L21/32134 ,  H01L21/67075 ,  H01L21/6715 ,  H01L22/14 ,  H01L22/20 ,  H01L22/22 ,  H01L23/525 ,  H01L23/5252

Abstract: A method of manufacturing a wafer. The method includes providing a wafer that includes a plurality of semiconductor device structures, and testing at least one of the plurality of semiconductor device structures. Based on a test result, a liquid is provided on a selected portion of the wafer to selectively alter at least one circuit element within the at least one of the plurality of semiconductor device structures.

公开(公告)号：US09673096B2

公开(公告)日：2017-06-06

申请号：US14541239

申请日：2014-11-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Joachim Hirschler ,  Michael Roesner ,  Markus Juch Heinrici ,  Gudrun Stranzl ,  Martin Mischitz ,  Martin Zgaga

IPC: H01L21/78 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/6835 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/94 ,  H01L24/95 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/03002 ,  H01L2224/03005 ,  H01L2224/03009 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03464 ,  H01L2224/03505 ,  H01L2224/03848 ,  H01L2224/039 ,  H01L2224/05794 ,  H01L2224/05847 ,  H01L2224/06181 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2221/68381

Abstract: According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.

公开(公告)号：US09640419B2

公开(公告)日：2017-05-02

申请号：US14451043

申请日：2014-08-04

Applicant: Infineon Technologies AG

Inventor： Manfred Schneegans ,  Martin Mischitz ,  Michael Roesner ,  Michael Pinczolits

IPC: H01L21/683 ,  H01L21/02 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L21/6836 ,  H01L21/56 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/49551 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/28 ,  H01L24/32 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03602 ,  H01L2224/0391 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/03

Abstract: In accordance with an alternative embodiment of the present invention, a method for forming a semiconductor device includes applying a paste over a semiconductor substrate, and forming a ceramic carrier by solidifying the paste. The semiconductor substrate is thinned using the ceramic carrier as a carrier.

公开(公告)号：US20160260658A1

公开(公告)日：2016-09-08

申请号：US15155271

申请日：2016-05-16

Applicant: Infineon Technologies AG

Inventor： Manfred Schneegans ,  Andreas Meiser ,  Martin Mischitz ,  Michael Roesner ,  Michael Pinczolits

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/528 ,  H01L21/48 ,  H01L21/78

CPC classification number: H01L23/49562 ,  H01L21/4807 ,  H01L21/56 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/32 ,  H01L24/49 ,  H01L24/94 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/03602 ,  H01L2224/0391 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/0603 ,  H01L2224/08245 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/0532 ,  H01L2924/05341 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/03

Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.

Abstract translation: 一种用于形成半导体器件的方法包括在具有第一侧和第二侧的半导体衬底中形成器件区域。 器件区域邻近第一侧形成。 该方法还包括在半导体衬底的第一侧上形成晶种层，并在种子层上形成图案化的抗蚀剂层。 在图案化的抗蚀剂层内的种子层上形成接触焊盘。 该方法还包括在形成接触焊盘之后去除图案化的抗蚀剂层，以暴露图案化抗蚀剂层下面的种子层的一部分，以及在种子层的暴露部分上形成保护层。