公开(公告)号：US20190165138A1

公开(公告)日：2019-05-30

申请号：US15934017

申请日：2018-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  Tong Jun Huang ,  I-Chih Chen ,  Chi-Cherng Jeng

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165 ,  H01L29/08

Abstract: A method is performed to a structure that includes a substrate with first and second regions for logic and RF devices respectively, first fin and first gate structure over the first region, second fin and second gate structure over the second region, and gate spacers over sidewalls of the gate structures. The method includes performing a first etching to the first fin to form a first recess; and performing a second etching to the second fin to form a second recess. The first and second etching are tuned to differ in at least one parameter such that the first recess is shallower than the second recess and a first distance between the first recess and the first gate structure along the first fin lengthwise is smaller than a second distance between the second recess and the second gate structure along the second fin lengthwise.

公开(公告)号：US10096672B2

公开(公告)日：2018-10-09

申请号：US15651751

申请日：2017-07-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： I-Chih Chen ,  Chih-Mu Huang ,  Fu-Tsun Tsai ,  Meng-Yi Wu ,  Yung-Fa Lee ,  Ying-Lang Wang

IPC: H01L21/425 ,  H01L21/02 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type region including a first conductivity type impurity. A first gate structure is on the semiconductor substrate overlying the first conductivity type region. A second conductivity type region including a second conductivity type impurity is formed in the semiconductor substrate. A barrier layer is located between the first conductivity type region and the second conductivity type region. The barrier layer prevents diffusion of the second conductivity type impurity from the second conductivity type region into the first conductivity type region.

公开(公告)号：US09728637B2

公开(公告)日：2017-08-08

申请号：US14080313

申请日：2013-11-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD

Inventor： Jung-Chi Jeng ,  I-Chih Chen ,  Wen-Chang Kuo ,  Ying-Hao Chen ,  Ru-Shang Hsiao ,  Chih-Mu Huang

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/7833 ,  H01L29/0649 ,  H01L29/6659

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and an isolation structure in the semiconductor substrate and surrounding an active region of the semiconductor substrate. The semiconductor device also includes a gate over the semiconductor substrate, and the gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, and the end portions are over the isolation structure. The semiconductor device further includes a support film over the isolation structure and covering the isolation structure and at least one of the end portions of the gate. The support film exposes the active region and the intermediate portion of the gate.

公开(公告)号：US11437495B2

公开(公告)日：2022-09-06

申请号：US17157180

申请日：2021-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih Chen ,  Ru-Shang Hsiao ,  Ching-Pin Lin ,  Chih-Mu Huang ,  Fu-Tsun Tsai

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US10804378B2

公开(公告)日：2020-10-13

申请号：US15934017

申请日：2018-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  Tong Jun Huang ,  I-Chih Chen ,  Chi-Cherng Jeng

IPC: H01L21/8234 ,  H01L29/66 ,  H01L21/02 ,  H01L29/08 ,  H01L29/78 ,  H01L29/165 ,  H01L27/088 ,  H01L21/311 ,  H01L27/092 ,  H01L21/8238

Abstract: A method is performed to a structure that includes a substrate with first and second regions for logic and RF devices respectively, first fin and first gate structure over the first region, second fin and second gate structure over the second region, and gate spacers over sidewalls of the gate structures. The method includes performing a first etching to the first fin to form a first recess; and performing a second etching to the second fin to form a second recess. The first and second etching are tuned to differ in at least one parameter such that the first recess is shallower than the second recess and a first distance between the first recess and the first gate structure along the first fin lengthwise is smaller than a second distance between the second recess and the second gate structure along the second fin lengthwise.

公开(公告)号：US10680103B2

公开(公告)日：2020-06-09

申请号：US15670978

申请日：2017-08-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jung-Chi Jeng ,  I-Chih Chen ,  Wen-Chang Kuo ,  Ying-Hao Chen ,  Ru-Shang Hsiao ,  Chih-Mu Huang

IPC: H01L21/8238 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate, and the isolation structure surrounds an active region of the semiconductor substrate. The method also includes forming a gate over the semiconductor substrate, and the gate is across the active region and extends onto the isolation structure. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, the end portions are over the isolation structure. The method includes forming a support film over the isolation structure, and the support film is a continuous film which continuously covers the isolation structure and at least one end portion of the gate.

公开(公告)号：US10608094B2

公开(公告)日：2020-03-31

申请号：US15877395

申请日：2018-01-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  I-Chih Chen ,  Chih-Mu Huang ,  Jiun-Jie Huang ,  Jen-Pan Wang

IPC: H01L29/423 ,  H01L29/40 ,  H01L21/3065 ,  H01L21/311 ,  H01L29/66 ,  H01L29/78

Abstract: Semiconductor devices and methods of forming the same are disclosed. A semiconductor device includes a substrate, a gate structure over the substrate, a spacer and a source/drain region. The gate structure is disposed over the substrate. The spacer is disposed on a sidewall of the gate structure, wherein the spacer has a top surface lower than a top surface of the gate structure. The source/drain region is disposed adjacent to a sidewall of the spacer.

公开(公告)号：US20200098896A1

公开(公告)日：2020-03-26

申请号：US16696261

申请日：2019-11-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  Tong Jun Huang ,  I-Chih Chen ,  Chi-Cherng Jeng

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/311 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/02 ,  H01L29/08 ,  H01L29/78 ,  H01L29/165

Abstract: A semiconductor device includes a substrate, a first fin extending from the substrate, a first gate structure over the substrate and engaging the first fin, and a first epitaxial feature partially embedded in the first fin and raised above a top surface of the first fin. The semiconductor device further includes a second fin extending from the substrate, a second gate structure over the substrate and engaging the second fin, and a second epitaxial feature partially embedded in the second fin and raised above a top surface of the second fin. A first depth of the first epitaxial feature embedded into the first fin is smaller than a second depth of the second epitaxial feature embedded into the second fin.

公开(公告)号：US10056455B1

公开(公告)日：2018-08-21

申请号：US15800097

申请日：2017-11-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Chun Kuan ,  I-Chih Chen ,  Chih-Mu Huang ,  Ching-Pin Lin ,  Fu-Tsun Tsai ,  Ru-Shang Hsiao

IPC: H01L29/06 ,  H01L29/08 ,  H01L27/088 ,  H01L21/02 ,  H01L23/532 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/0843 ,  H01L21/02107 ,  H01L21/0243 ,  H01L21/02639 ,  H01L23/53295 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/42312 ,  H01L29/42316 ,  H01L29/4232

Abstract: A semiconductor device including a substrate, a gate stack, a pair of insulator structures, and source/drain materials is provided. The substrate has a plurality of recesses, wherein the plurality of recesses defines a protruded portion of the substrate having a channel region, and the protruded portion has a first side surface and a second side surface opposite to the first side surface. The gate stack is disposed on the protruded portion of the substrate. The pair of insulator structures are disposed within the plurality of recesses and respectively covering parts of the first side surface and the second side surface of the protruded portion, wherein the channel region is uncovered by the pair of insulator structures. The source/drain materials are disposed on the substrate in the plurality of recesses and on two opposing sides of the channel region, wherein the source/drain materials cover the pair of insulator structures.

公开(公告)号：US09281215B2

公开(公告)日：2016-03-08

申请号：US14080368

申请日：2013-11-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Chi Jeng ,  I-Chih Chen ,  Wen-Chang Kuo ,  Ying-Hao Chen ,  Ru-Shang Hsiao ,  Chih-Mu Huang

IPC: H01L27/085 ,  H01L27/088 ,  H01L29/49 ,  H01L21/8238 ,  H01L21/3213 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/32135 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/8238 ,  H01L27/085 ,  H01L27/088 ,  H01L29/4238 ,  H01L29/49 ,  H01L29/4916 ,  H01L29/6659

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate. The semiconductor device also includes an isolation structure in the semiconductor substrate and surrounding an active region of the semiconductor substrate. The semiconductor device includes a gate over the semiconductor substrate. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion. Each of the end portions has a first gate length longer than a second gate length of the intermediate portion and is located over the isolation structure.

Abstract translation: 提供了用于形成半导体器件的机构的实施例。 半导体器件包括半导体衬底。 半导体器件还包括半导体衬底中的隔离结构并且围绕半导体衬底的有源区。 半导体器件包括半导体衬底上的栅极。 该栅极具有在有源区上方的中间部分和与该中间部分连接的两个端部。 每个端部具有长于中间部分的第二栅极长度的第一栅极长度并且位于隔离结构上方。