公开(公告)号：US11600727B2

公开(公告)日：2023-03-07

申请号：US16892458

申请日：2020-06-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jung-Chi Jeng ,  I-Chih Chen ,  Wen-Chang Kuo ,  Ying-Hao Chen ,  Ru-Shang Hsiao ,  Chih-Mu Huang

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate. The method includes forming a gate over the semiconductor substrate. The method includes forming a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a top surface and a second portion of a first sidewall of the gate, the top surface faces away from the semiconductor substrate, the support film and a topmost surface of the active region do not overlap with each other, and the topmost surface faces the gate. The method includes after forming the support film, forming lightly doped regions in the semiconductor substrate and at two opposite sides of the gate.

公开(公告)号：US10903336B2

公开(公告)日：2021-01-26

申请号：US16180623

申请日：2018-11-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih Chen ,  Ru-Shang Hsiao ,  Ching-Pin Lin ,  Chih-Mu Huang ,  Fu-Tsun Tsai

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US20190165126A1

公开(公告)日：2019-05-30

申请号：US16180623

申请日：2018-11-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih CHEN ,  Ru-Shang Hsiao ,  Ching-Pin Lin ,  Chih-Mu Huang ,  Fu-Tsun Tsai

IPC: H01L29/66 ,  H01L27/088 ,  H01L29/423 ,  H01L21/8234

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US20190139956A1

公开(公告)日：2019-05-09

申请号：US16151329

申请日：2018-10-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Jung Chen ,  I-Chih Chen ,  Chih-Mu Huang ,  Kai-Di Wu ,  Ming-Feng Lee ,  Ting-Chun Kuan

IPC: H01L27/088 ,  H01L29/10 ,  H01L29/423 ,  H01L21/8234 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.

公开(公告)号：US10153278B1

公开(公告)日：2018-12-11

申请号：US15717972

申请日：2017-09-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Lin Hsieh ,  I-Chih Chen ,  Chih-Mu Huang ,  Ching-Pin Lin ,  Ru-Shang Hsiao ,  Ting-Chun Kuan

IPC: H01L27/08 ,  H01L27/088 ,  H01L29/10 ,  H01L29/08 ,  H01L21/306 ,  H01L21/8234 ,  H01L21/762 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L29/06 ,  H01L29/167 ,  H01L21/308 ,  H01L29/78 ,  H01L29/165

Abstract: A fin-type field effect transistor comprising a substrate, at least one gate stack, spacers and epitaxy material portions is described. The substrate has fins and insulators located between the fins, and the fins comprise channel portions and flank portions beside the channel portions, the flank portions and the channel portions of the fins are protruded from the insulators, the flank portions of the fins and the channel portions of the fins have substantially a same height from top surfaces of the insulators, and each of the flank portions of the fins has a top surface and side surfaces adjoining the top surface. The at least one gate stack is disposed over the substrate, disposed on the insulators and over the channel portions of the fins. The spacers are disposed on the side surfaces of the flank portions of the fins. The epitaxy material portions are located above the top surfaces of the flank portions of the fins.

公开(公告)号：US20150263136A1

公开(公告)日：2015-09-17

申请号：US14205841

申请日：2014-03-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ru-Shang Hsiao ,  Ling-Sung Wang ,  Chih-Mu Huang

IPC: H01L29/66 ,  H01L21/28 ,  H01L21/265 ,  H01L21/762 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L29/66795 ,  H01L21/28114 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66545 ,  H01L29/785

Abstract: Some embodiments relate to an integrated circuit (IC) including one or more field-effect transistor devices. A field effect transistor device includes source/drain regions disposed in an active region of a semiconductor substrate and separated from one another along a first direction by a channel region. A shallow trench isolation (STI) region, which has an upper STI surface, laterally surrounds the active region. The STI region includes trench regions, which have lower trench surfaces below the upper STI surface and which extend from opposite sides of the channel region in a second direction which intersects the first direction. A metal gate electrode extends in the second direction and has lower portions which are disposed in the trench regions and which are separated from one another by the channel region. The metal gate electrode has an upper portion bridging over the channel region to couple the lower portions to one another.

Abstract translation: 一些实施例涉及包括一个或多个场效应晶体管器件的集成电路（IC）。 场效应晶体管器件包括设置在半导体衬底的有源区中并通过沟道区沿着第一方向彼此分离的源/漏区。 具有上STI表面的浅沟槽隔离（STI）区域横向围绕有源区域。 STI区域包括沟槽区域，其具有在上STI表面下方的较低沟槽表面，并且在与第一方向相交的第二方向上从沟道区域的相对侧延伸。 金属栅电极沿第二方向延伸，并且具有设置在沟槽区域中并且通过沟道区彼此分离的下部。 金属栅电极具有桥接在沟道区上的上部，以将下部彼此耦合。

公开(公告)号：US11437495B2

公开(公告)日：2022-09-06

申请号：US17157180

申请日：2021-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih Chen ,  Ru-Shang Hsiao ,  Ching-Pin Lin ,  Chih-Mu Huang ,  Fu-Tsun Tsai

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US10680103B2

公开(公告)日：2020-06-09

申请号：US15670978

申请日：2017-08-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jung-Chi Jeng ,  I-Chih Chen ,  Wen-Chang Kuo ,  Ying-Hao Chen ,  Ru-Shang Hsiao ,  Chih-Mu Huang

IPC: H01L21/8238 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate, and the isolation structure surrounds an active region of the semiconductor substrate. The method also includes forming a gate over the semiconductor substrate, and the gate is across the active region and extends onto the isolation structure. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, the end portions are over the isolation structure. The method includes forming a support film over the isolation structure, and the support film is a continuous film which continuously covers the isolation structure and at least one end portion of the gate.

公开(公告)号：US10608094B2

公开(公告)日：2020-03-31

申请号：US15877395

申请日：2018-01-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  I-Chih Chen ,  Chih-Mu Huang ,  Jiun-Jie Huang ,  Jen-Pan Wang

IPC: H01L29/423 ,  H01L29/40 ,  H01L21/3065 ,  H01L21/311 ,  H01L29/66 ,  H01L29/78

Abstract: Semiconductor devices and methods of forming the same are disclosed. A semiconductor device includes a substrate, a gate structure over the substrate, a spacer and a source/drain region. The gate structure is disposed over the substrate. The spacer is disposed on a sidewall of the gate structure, wherein the spacer has a top surface lower than a top surface of the gate structure. The source/drain region is disposed adjacent to a sidewall of the spacer.

公开(公告)号：US10056455B1

公开(公告)日：2018-08-21

申请号：US15800097

申请日：2017-11-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Chun Kuan ,  I-Chih Chen ,  Chih-Mu Huang ,  Ching-Pin Lin ,  Fu-Tsun Tsai ,  Ru-Shang Hsiao

IPC: H01L29/06 ,  H01L29/08 ,  H01L27/088 ,  H01L21/02 ,  H01L23/532 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/0843 ,  H01L21/02107 ,  H01L21/0243 ,  H01L21/02639 ,  H01L23/53295 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/42312 ,  H01L29/42316 ,  H01L29/4232

Abstract: A semiconductor device including a substrate, a gate stack, a pair of insulator structures, and source/drain materials is provided. The substrate has a plurality of recesses, wherein the plurality of recesses defines a protruded portion of the substrate having a channel region, and the protruded portion has a first side surface and a second side surface opposite to the first side surface. The gate stack is disposed on the protruded portion of the substrate. The pair of insulator structures are disposed within the plurality of recesses and respectively covering parts of the first side surface and the second side surface of the protruded portion, wherein the channel region is uncovered by the pair of insulator structures. The source/drain materials are disposed on the substrate in the plurality of recesses and on two opposing sides of the channel region, wherein the source/drain materials cover the pair of insulator structures.