公开(公告)号：US11271111B2

公开(公告)日：2022-03-08

申请号：US16405057

申请日：2019-05-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Chun Kuan ,  I-Chih Chen ,  Chih-Mu Huang ,  Fu-Tsun Tsai ,  Sheng-Lin Hsieh ,  Kuan-Jung Chen

IPC: H01L29/78 ,  H01L21/8234 ,  H01L21/02 ,  H01L29/66 ,  H01L21/768 ,  H01L27/088

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a gate structure over the substrate. The semiconductor device structure also includes a source/drain feature in the substrate, protruding from the substrate, and on a sidewall surface of the gate structure. The semiconductor device structure also includes an insulating barrier structure in the substrate and partially covering the bottom and sidewalls of the source/drain feature.

公开(公告)号：US12159921B2

公开(公告)日：2024-12-03

申请号：US17881317

申请日：2022-08-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih Chen ,  Ru-Shang Hsiao ,  Ching-Pin Lin ,  Chih-Mu Huang ,  Fu-Tsun Tsai

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/423

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US20190229199A1

公开(公告)日：2019-07-25

申请号：US15877395

申请日：2018-01-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  I-Chih Chen ,  Chih-Mu Huang ,  Jiun-Jie Huang ,  Jen-Pan Wang

IPC: H01L29/423 ,  H01L29/40 ,  H01L21/3065

Abstract: Semiconductor devices and methods of forming the same are disclosed. A semiconductor device includes a substrate, a gate structure over the substrate, a spacer and a source/drain region. The gate structure is disposed over the substrate. The spacer is disposed on a sidewall of the gate structure, wherein the spacer has a top surface lower than a top surface of the gate structure. The source/drain region is disposed adjacent to a sidewall of the spacer.

公开(公告)号：US09318368B2

公开(公告)日：2016-04-19

申请号：US14080631

申请日：2013-11-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Fu-Cheng Chang ,  Chai-Der Yen ,  Fu-Tsun Tsai ,  Chi-Cherng Jeng ,  Chih-Mu Huang

IPC: H01L21/76 ,  H01L21/762 ,  G03F1/00

CPC classification number: H01L21/76229 ,  G03F1/00 ,  H01L21/0274 ,  H01L21/3083

Abstract: In a method for manufacturing a dual shallow trench isolation structure, a substrate is provided, and a mask layer is formed on the substrate. The mask layer is patterned by using a photomask to form at least one first hole and at least one second hole in the mask layer, in which a depth of the at least one first hole is different from a depth of the at least one second hole. The mask layer and the substrate are etched to form at least one first trench having a first depth and at least one second trench having a second depth, in which the first depth is different from the second depth. The remaining mask layer is removed. A first isolation layer and A second isolation layer are respectively formed in the at least one first trench and the at least one second trench.

Abstract translation: 在制造双浅沟槽隔离结构的方法中，提供衬底，并且在衬底上形成掩模层。 通过使用光掩模来对掩模层进行构图，以在掩模层中形成至少一个第一孔和至少一个第二孔，其中至少一个第一孔的深度不同于至少一个第二孔的深度 。 蚀刻掩模层和衬底以形成具有第一深度的至少一个第一沟槽和具有第二深度的至少一个第二沟槽，其中第一深度不同于第二深度。 剩下的掩模层被去除。 第一隔离层和第二隔离层分别形成在至少一个第一沟槽和至少一个第二沟槽中。

公开(公告)号：US20190165138A1

公开(公告)日：2019-05-30

申请号：US15934017

申请日：2018-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  Tong Jun Huang ,  I-Chih Chen ,  Chi-Cherng Jeng

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165 ,  H01L29/08

Abstract: A method is performed to a structure that includes a substrate with first and second regions for logic and RF devices respectively, first fin and first gate structure over the first region, second fin and second gate structure over the second region, and gate spacers over sidewalls of the gate structures. The method includes performing a first etching to the first fin to form a first recess; and performing a second etching to the second fin to form a second recess. The first and second etching are tuned to differ in at least one parameter such that the first recess is shallower than the second recess and a first distance between the first recess and the first gate structure along the first fin lengthwise is smaller than a second distance between the second recess and the second gate structure along the second fin lengthwise.

公开(公告)号：US10096672B2

公开(公告)日：2018-10-09

申请号：US15651751

申请日：2017-07-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： I-Chih Chen ,  Chih-Mu Huang ,  Fu-Tsun Tsai ,  Meng-Yi Wu ,  Yung-Fa Lee ,  Ying-Lang Wang

IPC: H01L21/425 ,  H01L21/02 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type region including a first conductivity type impurity. A first gate structure is on the semiconductor substrate overlying the first conductivity type region. A second conductivity type region including a second conductivity type impurity is formed in the semiconductor substrate. A barrier layer is located between the first conductivity type region and the second conductivity type region. The barrier layer prevents diffusion of the second conductivity type impurity from the second conductivity type region into the first conductivity type region.

公开(公告)号：US11532728B2

公开(公告)日：2022-12-20

申请号：US16696261

申请日：2019-11-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Tsun Tsai ,  Tong Jun Huang ,  I-Chih Chen ,  Chi-Cherng Jeng

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/08 ,  H01L27/092 ,  H01L29/66 ,  H01L21/02 ,  H01L29/165 ,  H01L21/8234 ,  H01L21/311 ,  H01L21/8238

Abstract: A semiconductor device includes a substrate, a first fin extending from the substrate, a first gate structure over the substrate and engaging the first fin, and a first epitaxial feature partially embedded in the first fin and raised above a top surface of the first fin. The semiconductor device further includes a second fin extending from the substrate, a second gate structure over the substrate and engaging the second fin, and a second epitaxial feature partially embedded in the second fin and raised above a top surface of the second fin. A first depth of the first epitaxial feature embedded into the first fin is smaller than a second depth of the second epitaxial feature embedded into the second fin.

公开(公告)号：US10903336B2

公开(公告)日：2021-01-26

申请号：US16180623

申请日：2018-11-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih Chen ,  Ru-Shang Hsiao ,  Ching-Pin Lin ,  Chih-Mu Huang ,  Fu-Tsun Tsai

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US20190165126A1

公开(公告)日：2019-05-30

申请号：US16180623

申请日：2018-11-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Chih CHEN ,  Ru-Shang Hsiao ,  Ching-Pin Lin ,  Chih-Mu Huang ,  Fu-Tsun Tsai

IPC: H01L29/66 ,  H01L27/088 ,  H01L29/423 ,  H01L21/8234

Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

公开(公告)号：US09627426B2

公开(公告)日：2017-04-18

申请号：US14192168

申请日：2014-02-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Volume Chien ,  Yu-Heng Cheng ,  Fu-Tsun Tsai ,  Hsi-Jung Wu ,  Chi-Cherng Jeng

IPC: H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14685

Abstract: Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate. The semiconductor substrate has a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a reflective layer positioned on an inner wall of the trench, wherein the reflective layer has a light reflectivity ranging from about 70% to about 100%.