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    DOPING CONTROL METHODS AND RELATED SYSTEMS
    11.
    发明申请
    DOPING CONTROL METHODS AND RELATED SYSTEMS 审中-公开
    控制方法和相关系统

    公开(公告)号：US20160020086A1

    公开(公告)日：2016-01-21

    申请号：US14335257

    申请日：2014-07-18

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Chun Hsiung Tsai ,  Ming-Te Chen

    IPC: H01L21/02 ,  H01L21/67 ,  H01L21/687 ,  C30B25/08 ,  C30B25/14

    CPC classification number: H01L21/68742 ,  C23C16/4405 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/67115

    Abstract: A system for cleaning dopant contamination in a process chamber is disclosed. The system includes a susceptor and a chamber kit component, a first plurality of lamps configured to heat the susceptor, a second plurality of lamps configured to heat the chamber kit component, and a gas supply configured to provide a chlorine cleaning gas. The system is configured to deposit a layer on a substrate at a deposition temperature and perform an in-situ clean of the process chamber, including the chamber kit component, at the deposition temperature. A method for cleaning dopant contamination includes depositing a layer over a substrate at a deposition temperature, performing an in-situ clean of the process chamber and a process kit component at the deposition temperature, unloading the substrate, and performing a dedicated clean at a clean temperature. In some examples, the clean temperature is about equal to the deposition temperature.

    Abstract translation: 公开了一种用于清洁处理室中的掺杂剂污染的系统。 该系统包括基座和腔室套件部件，配置为加热基座的第一多个灯，配置成加热腔室套件组件的第二组多个灯以及配置成提供氯气清洁气体的气体供应。 该系统被配置为在沉积温度下在基底上沉积一层，并在沉积温度下对包括腔室试剂盒组分在内的处理室进行原位清洁。 用于清洁掺杂剂污染物的方法包括在沉积温度下在衬底上沉积层，在沉积温度下进行处理室的原位清洁和处理工具组件，卸载衬底，以及清洁干净 温度。 在一些实例中，清洁温度大约等于沉积温度。

    Method of forming a shallow trench isolation structure
    17.
    发明授权
    Method of forming a shallow trench isolation structure 有权
    形成浅沟槽隔离结构的方法

    公开(公告)号：US08975155B2

    公开(公告)日：2015-03-10

    申请号：US13938948

    申请日：2013-07-10

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Chia-Yi Chuang ,  Ta-Hsiang Kung ,  Hsing-Jui Lee ,  Ming-Te Chen

    IPC: H01L21/76 ,  H01L21/762 ,  H01L29/06

    CPC classification number: H01L29/0649 ,  H01L21/76224

    Abstract: Embodiments of the disclosure include a shallow trench isolation (STI) structure and a method of forming the same. A trench is formed in a substrate. A silicon oxide and a silicon liner layer are formed on sidewalls and a bottom surface of the trench. A flowable silicon oxide material fills in the trench, is cured, and then is partially removed. Another silicon oxide is deposited in the trench to fill the trench. The STI structure in a fabricated device includes a bottom portion having silicon oxide and a top portion having additionally a silicon oxide liner and a silicon liner on the sidewalls.

    Abstract translation: 本公开的实施例包括浅沟槽隔离（STI）结构及其形成方法。 在衬底中形成沟槽。 在沟槽的侧壁和底表面上形成氧化硅和硅衬层。 可流动的氧化硅材料填充在沟槽中，被固化，然后被部分去除。 在沟槽中沉积另一个氧化硅以填充沟槽。 制造装置中的STI结构包括具有氧化硅的底部部分和在侧壁上另外具有氧化硅衬垫和硅衬垫的顶部部分。

    METHOD OF FORMING A SHALLOW TRENCH ISOLATION STRUCTURE
    18.
    发明申请
    METHOD OF FORMING A SHALLOW TRENCH ISOLATION STRUCTURE 有权
    形成浅层隔离结构的方法

    公开(公告)号：US20150014807A1

    公开(公告)日：2015-01-15

    申请号：US13938948

    申请日：2013-07-10

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Chia-Yi Chuang ,  Ta-Hsiang Kung ,  Hsing-Jui Lee ,  Ming-Te Chen

    IPC: H01L21/762 ,  H01L29/06

    CPC classification number: H01L29/0649 ,  H01L21/76224

    Abstract: Embodiments of the disclosure include a shallow trench isolation (STI) structure and a method of forming the same. A trench is formed in a substrate. A silicon oxide and a silicon liner layer are formed on sidewalls and a bottom surface of the trench. A flowable silicon oxide material fills in the trench, is cured, and then is partially removed. Another silicon oxide is deposited in the trench to fill the trench. The STI structure in a fabricated device includes a bottom portion having silicon oxide and a top portion having additionally a silicon oxide liner and a silicon liner on the sidewalls.

    Abstract translation: 本公开的实施例包括浅沟槽隔离（STI）结构及其形成方法。 在衬底中形成沟槽。 在沟槽的侧壁和底表面上形成氧化硅和硅衬层。 可流动的氧化硅材料填充在沟槽中，被固化，然后被部分去除。 在沟槽中沉积另一个氧化硅以填充沟槽。 制造装置中的STI结构包括具有氧化硅的底部部分和在侧壁上另外具有氧化硅衬垫和硅衬垫的顶部部分。

    System and Method for Forming a Semiconductor Device
    20.
    发明申请
    System and Method for Forming a Semiconductor Device 有权
    用于形成半导体器件的系统和方法

    公开(公告)号：US20140273294A1

    公开(公告)日：2014-09-18

    申请号：US13892421

    申请日：2013-05-13

    Applicant: Taiwan Semiconductor manufacturing Company, Ltd.

    Inventor： Chun Hsiung Tsai ,  Ming-Te Chen

    IPC: H01L21/26 ,  H01L21/66 ,  H01L21/67

    CPC classification number: H01L22/12 ,  H01L21/324 ,  H01L21/67288 ,  H01L22/20 ,  H01L22/26

    Abstract: A system and method for forming a semiconductor device is provided. The system may measure characteristics of the substrate to determine an amount of induced stress on the substrate. The measured characteristics may include warpage, reflectivity and/or crack information about the substrate. The induced stress may be determined, at least in part, based on the measured characteristics. The system may compare the induced stress on the substrate to a maximum intrinsic strength of the substrate and adjust an anneal for the substrate based on the comparison. The adjustment may reduce or limit breakage of the substrate during the anneal. The system may control at least one of a peak anneal temperature and a maximum anneal duration for an anneal unit, which may perform an anneal on the substrate. The measurements and control may be performed ex-situ or in-situ with the anneal.

    Abstract translation: 提供一种用于形成半导体器件的系统和方法。 该系统可以测量衬底的特性以确定衬底上的诱发应力的量。 测量的特性可以包括关于衬底的翘曲，反射率和/或裂纹信息。 诱发的应力可以至少部分地基于所测量的特性来确定。 该系统可以将衬底上的感应应力与衬底的最大固有强度进行比较，并基于该比较调整衬底的退火。 该调整可以减少或限制退火期间的衬底断裂。 该系统可以控制退火单元的峰退火温度和最大退火持续时间中的至少一个，其可以在衬底上执行退火。 测量和控制可以用退火进行原位或原位进行。

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