公开(公告)号：US12294005B2

公开(公告)日：2025-05-06

申请号：US18521253

申请日：2023-11-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo Cheol Shin ,  Myung Gil Kang ,  Sadaaki Masuoka ,  Sang Hoon Lee ,  Sung Man Whang

IPC: H01L27/092 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/04 ,  H01L29/06 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a first semiconductor layer having first and second regions, a plurality of first channel layers spaced apart from each other in a vertical direction on the first region of the first semiconductor layer, a first gate electrode surrounding the plurality of first channel layers, a plurality of second channel layers spaced apart from one another in the vertical direction on the second region of the first semiconductor layer, and a second gate electrode surrounding the plurality of second channel layers, wherein each of the plurality of first channel layers has a first crystallographic orientation, and each of the plurality of second channel layers has a second crystallographic orientation different from the first crystallographic orientation, and wherein a thickness of each of the plurality of first channel layers is different from a thickness of each of the plurality of second channel layers.

公开(公告)号：US11862639B2

公开(公告)日：2024-01-02

申请号：US17894427

申请日：2022-08-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woo Cheol Shin ,  Myung Gil Kang ,  Sadaaki Masuoka ,  Sang Hoon Lee ,  Sung Man Whang

IPC: H01L27/092 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/04 ,  H01L21/02 ,  H01L29/16 ,  H01L21/8238

CPC classification number: H01L27/0924 ,  H01L21/02532 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L29/045 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/6681 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/785

Abstract: A semiconductor device includes a first semiconductor layer having first and second regions, a plurality of first channel layers spaced apart from each other in a vertical direction on the first region of the first semiconductor layer, a first gate electrode surrounding the plurality of first channel layers, a plurality of second channel layers spaced apart from one another in the vertical direction on the second region of the first semiconductor layer, and a second gate electrode surrounding the plurality of second channel layers, wherein each of the plurality of first channel layers has a first crystallographic orientation, and each of the plurality of second channel layers has a second crystallographic orientation different from the first crystallographic orientation, and wherein a thickness of each of the plurality of first channel layers is different from a thickness of each of the plurality of second channel layers.

公开(公告)号：US20230051602A1

公开(公告)日：2023-02-16

申请号：US17725180

申请日：2022-04-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Beomjin PARK ,  Hyojin Kim ,  Myung Gil Kang ,  Jinbum Kim ,  Sangmoon Lee ,  Dongwon Kim ,  Keun Hwi Cho

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/66

Abstract: A semiconductor device is provided. The semiconductor device includes: an active pattern provided on a substrate and extending in a first direction; a pair of source/drain patterns provided on the active pattern and spaced apart from each other in the first direction; a plurality of channel layers vertically stacked and spaced apart from each other on the active pattern between the pair of source/drain patterns; a gate electrode extending in a second direction between the pair of source/drain patterns, the gate electrode being provided on the active pattern and surrounding the plurality of channel layers, and the second direction intersecting the first direction; and a gate spacer provided between the plurality of channel layers, and between the gate electrode and the pair of source/drain patterns. The gate spacer includes a plurality of first spacer patterns and a plurality of second spacer patterns that are alternately stacked on sidewalls of the pair of source/drain patterns.

公开(公告)号：US20220399452A1

公开(公告)日：2022-12-15

申请号：US17651623

申请日：2022-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Beomjin Park ,  Myung Gil Kang ,  Dongwon Kim ,  Keun Hwi Cho

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/06

Abstract: A semiconductor device may include a first active pattern on a substrate, a pair of first source/drain patterns on the first active pattern and a first channel pattern between the first source/drain patterns, the first channel pattern including first semiconductor patterns, which are spaced apart from each other in a stacked formation, a gate electrode on the first channel pattern, a first gate cutting pattern adjacent to the first channel pattern that penetrates the gate electrode, and a first spacer pattern between the first gate cutting pattern and the first channel pattern. The first spacer pattern may include a first remaining pattern adjacent to an outermost side surface of at least one of the first semiconductor patterns and a second remaining pattern on the first remaining pattern. The second remaining pattern may be spaced apart from the first gate cutting pattern.

公开(公告)号：US11362182B2

公开(公告)日：2022-06-14

申请号：US17088011

申请日：2020-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ilgyou Shin ,  Minyi Kim ,  Myung Gil Kang ,  Jinbum Kim ,  Seung Hun Lee ,  Keun Hwi Cho

IPC: H01L29/15 ,  H01L29/78 ,  H01L29/417 ,  H01L29/10

Abstract: A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen.

公开(公告)号：US11024628B2

公开(公告)日：2021-06-01

申请号：US16405174

申请日：2019-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Woo Noh ,  Myung Gil Kang ,  Geum Jong Bae ,  Dong Il Bae ,  Jung Gil Yang ,  Sang Hoon Lee

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/033 ,  H01L21/8238 ,  H01L29/10 ,  H01L29/08

Abstract: Semiconductor devices are provided. The semiconductor devices may include a first wire pattern extending in a first direction on a substrate and a second wire pattern on the first wire pattern. The second wire pattern may be spaced apart from the first wire pattern and extends in the first direction. The semiconductor devices may also include a first gate structure at least partially surrounding the first wire pattern and the second wire pattern, a second gate structure spaced apart from the first gate structure in the first direction, a first source/drain region between the first gate structure and the second gate structure, a first spacer between a bottom surface of the first source/drain region and the substrate, a first source/drain contact on the first source/drain region, and a second spacer between the first source/drain contact and the first gate structure.

公开(公告)号：US10833085B2

公开(公告)日：2020-11-10

申请号：US16439999

申请日：2019-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woo Cheol Shin ,  Myung Gil Kang ,  Sadaaki Masuoka ,  Sang Hoo Lee ,  Sung Man Whang

IPC: H01L27/092 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/04 ,  H01L21/02 ,  H01L29/16 ,  H01L21/8238

Abstract: A semiconductor device includes a first semiconductor layer having first and second regions, a plurality of first channel layers spaced apart from each other in a vertical direction on the first region of the first semiconductor layer, a first gate electrode surrounding the plurality of first channel layers, a plurality of second channel layers spaced apart from one another in the vertical direction on the second region of the first semiconductor layer, and a second gate electrode surrounding the plurality of second channel layers, wherein each of the plurality of first channel layers has a first crystallographic orientation, and each of the plurality of second channel layers has a second crystallographic orientation different from the first crystallographic orientation, and wherein a thickness of each of the plurality of first channel layers is different from a thickness of each of the plurality of second channel layers.

公开(公告)号：US10665702B2

公开(公告)日：2020-05-26

申请号：US16151511

申请日：2018-10-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Gil Kang ,  Ill Seo Kang ,  Yong Hee Park ,  Sang Hoon Baek ,  Keon Yong Cheon

IPC: H01L29/66 ,  H01L29/732 ,  H01L27/082 ,  H01L29/06 ,  H01L29/08 ,  H01L21/28 ,  H01L29/49 ,  H01L29/51 ,  H01L21/308 ,  H01L29/10 ,  H01L27/06 ,  H01L21/8249 ,  H01L21/8238

Abstract: A vertical bipolar transistor including a substrate including a first well of a first conductivity type and a second well of a second conductivity type different from the first conductivity type, the first well adjoining the second well, a first fin extending, from the first well, a second fin extending from the first well, a third fin extending from the second well, a first conductive region on the first fin, having the second conductivity type and configured to serve as an emitter of the vertical bipolar transistor, a second conductive region on the second fin, having the first conductivity type, and configured to serve as a base of the vertical bipolar transistor, and a third conductive region on the third fin, having the second conductivity type, and configured to serve as a collector of the vertical bipolar transistor may be provided.

公开(公告)号：US09653551B2

公开(公告)日：2017-05-16

申请号：US14980134

申请日：2015-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changwoo Oh ,  Myung Gil Kang ,  Bomsoo Kim ,  Jongshik Yoon

IPC: H01L27/12 ,  H01L29/10 ,  H01L21/84 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L27/092 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/1041 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/063 ,  H01L29/0649 ,  H01L29/0676 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/785

Abstract: Field effect transistors are provided. According to the field effect transistor, a source region and a drain region are provided on a substrate and a fin portion is provided to protrude from the substrate. The fin portion connects the source region and the drain region to each other. A gate electrode pattern is disposed on the fin portion and extends to cross over the fin portion. A gate dielectric layer is disposed between the fin portion and the gate electrode pattern. A semiconductor layer is disposed between the fin portion and the gate dielectric layer. The semiconductor layer and the fin portion have dopant-concentrations different from each other, respectively.

公开(公告)号：US09520458B2

公开(公告)日：2016-12-13

申请号：US14718685

申请日：2015-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Gil Kang ,  Dongwon Kim ,  Ilryong Kim ,  Changwoo Oh ,  Keun Hwi Cho ,  Toshinori Fukai

IPC: H01L27/11 ,  H01L49/02 ,  H01L27/06

CPC classification number: H01L28/20 ,  H01L27/0629

Abstract: Embodiments of the inventive concepts provide a resistor and a semiconductor device including the same. The resistor includes a substrate, a device isolation layer in the substrate which defines active regions arranged in a first direction a resistance layer including resistance patterns that vertically protrude from the active regions and are connected to each other in the first direction, and contact electrodes on the resistance layer.

Abstract translation: 本发明构思的实施例提供一种电阻器和包括该电阻器的半导体器件。 电阻器包括衬底，衬底中的器件隔离层，其限定在第一方向上布置的有源区，包括从有源区垂直突出并在第一方向上彼此连接的电阻图案的电阻层，以及接触电极 电阻层。