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    SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE PATTERN
    1.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE PATTERN 有权

    公开(公告)号：US20250120149A1

    公开(公告)日：2025-04-10

    申请号：US18949790

    申请日：2024-11-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ilgyou Shin ,  Minyi Kim ,  Myung Gil Kang ,  Jinbum Kim ,  Seung Hun Lee ,  Keun Hwi Cho

    IPC: H10D62/815 ,  H10D30/62 ,  H10D62/17

    Abstract: A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen.

    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12274085B2

    公开(公告)日：2025-04-08

    申请号：US17354605

    申请日：2021-06-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Myung Gil Kang ,  Dong Won Kim ,  Geum Jong Bae ,  Kwan Young Chun

    IPC: H10D30/67 ,  H10B10/00 ,  H10D62/10 ,  H10D84/85

    Abstract: A semiconductor device is provided. The semiconductor device includes: a first wire pattern disposed on a substrate and extending in a first direction; a first gate electrode surrounding the first wire pattern and extending in a second direction, the first direction intersecting the second direction perpendicularly; a first transistor including the first wire pattern and the first gate electrode; a second wire pattern disposed on the substrate and extending in the first direction; a second gate electrode surrounding the second wire pattern and extending in the second direction; and a second transistor including the second wire pattern and the second gate electrode, wherein a width of the first wire pattern in the second direction is different from a width of the second wire pattern in the second direction.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20250015157A1

    公开(公告)日：2025-01-09

    申请号：US18599943

    申请日：2024-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Beomjin Park ,  Myung Gil Kang ,  Dongwon Kim ,  Younggwon Kim ,  Jongsu Kim ,  Hyumin Yoo ,  Soojin Jeong

    IPC: H01L29/423 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/775 ,  H01L29/786

    Abstract: The present disclosure relates to semiconductor devices and their fabrication methods. An example semiconductor device comprises a substrate including an active pattern, a channel pattern including semiconductor patterns, a source/drain pattern connected to the semiconductor patterns, an inner gate electrode between two neighboring semiconductor patterns, an inner gate dielectric layer, and an inner high-k dielectric layer between the inner gate electrode and the inner gate dielectric layer. The inner gate dielectric layer includes an upper dielectric layer, a lower dielectric layer, and an inner spacer. A first thickness of the inner spacer is greater than a second thickness of the upper or lower dielectric layer. The first thickness is greater than a third thickness of the inner high-k dielectric layer.

    Semiconductor devices
    5.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11855165B2

    公开(公告)日：2023-12-26

    申请号：US18051034

    申请日：2022-10-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Keun Hwi Cho ,  Soonmoon Jung ,  Dongwon Kim ,  Myung Gil Kang

    IPC: H01L29/423 ,  H01L23/528 ,  H01L27/092 ,  H01L29/417

    CPC classification number: H01L29/42356 ,  H01L23/5286 ,  H01L27/092 ,  H01L29/41775 ,  H01L29/42376

    Abstract: Semiconductor devices and methods of forming the same are disclosed. The semiconductor devices may include a substrate including a first region and a second region, which are spaced apart from each other with a device isolation layer interposed therebetween, a first gate electrode and a second gate electrode on the first and second regions, respectively, an insulating separation pattern separating the first gate electrode and the second gate electrode from each other and extending in a second direction that traverses the first direction, a connection structure electrically connecting the first gate electrode to the second gate electrode, and a first signal line electrically connected to the connection structure. The first and second gate electrodes are extended in a first direction and are aligned to each other in the first direction. The first signal line may extend in the second direction and may vertically overlap the insulating separation pattern.

    Semiconductor devices
    7.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11489055B2

    公开(公告)日：2022-11-01

    申请号：US17192959

    申请日：2021-03-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Keun Hwi Cho ,  Soonmoon Jung ,  Dongwon Kim ,  Myung Gil Kang

    IPC: H01L29/423 ,  H01L27/092 ,  H01L23/528 ,  H01L29/417

    Abstract: Semiconductor devices and methods of forming the same are disclosed. The semiconductor devices may include a substrate including a first region and a second region, which are spaced apart from each other with a device isolation layer interposed therebetween, a first gate electrode and a second gate electrode on the first and second regions, respectively, an insulating separation pattern separating the first gate electrode and the second gate electrode from each other and extending in a second direction that traverses the first direction, a connection structure electrically connecting the first gate electrode to the second gate electrode, and a first signal line electrically connected to the connection structure. The first and second gate electrodes are extended in a first direction and are aligned to each other in the first direction. The first signal line may extend in the second direction and may vertically overlap the insulating separation pattern.

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11450761B2

    公开(公告)日：2022-09-20

    申请号：US16857621

    申请日：2020-04-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Myung Gil Kang ,  Dongwon Kim ,  Minyi Kim ,  Keun Hwi Cho

    IPC: H01L29/66 ,  H01L29/732 ,  H01L29/735 ,  H01L21/8228 ,  H01L21/8238 ,  H01L29/06

    Abstract: A semiconductor device including a well region in a substrate, an impurity region in the well region, a first active fin on the impurity region, a second active fin on the well region, and a connection pattern penetrating the second active fin and connected to the well region may be provided. The substrate and the impurity region include impurities having a first conductivity type. The well region includes impurities having a second conductivity type different from the first conductivity type. The first active fin includes a plurality of first semiconductor patterns that are spaced apart from each other in a direction perpendicular to a top surface of the substrate. The first semiconductor patterns and the impurity region include impurities having the first conductivity type.

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220199798A1

    公开(公告)日：2022-06-23

    申请号：US17457661

    申请日：2021-12-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Myung Gil Kang ,  Keun Hwi Cho ,  Sangdeok Kwon ,  Dongwon Kim ,  Hyun-Seung Song

    IPC: H01L29/423 ,  H01L23/522 ,  H01L27/088 ,  H01L29/786

    Abstract: A semiconductor device includes a substrate that includes a peripheral region, a first active pattern on the peripheral region, a first source/drain pattern on the first active pattern, a first channel pattern formed on the first active pattern and connected to the first source/drain pattern, wherein the first channel pattern includes semiconductor patterns that are stacked and spaced apart from each other, a first gate electrode that extends in a first direction and crosses the first channel pattern, a gate insulating layer interposed between the first gate electrode and the first channel pattern, a first gate contact disposed on the first gate electrode and that extends in the first direction, and a first dielectric layer interposed between the first gate electrode and the first gate contact. The first dielectric layer is interposed between the first gate contact and the first gate electrode and extends in the first direction.

    Vertical field effect transistor having two-dimensional channel structure
    10.
    发明授权
    Vertical field effect transistor having two-dimensional channel structure 有权

    公开(公告)号：US10957795B2

    公开(公告)日：2021-03-23

    申请号：US16845591

    申请日：2020-04-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yong Hee Park ,  Myung Gil Kang ,  Young-Seok Song ,  Keon Yong Cheon

    IPC: H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L27/12

    Abstract: A vertical field effect transistor (VFET) including a first source/drain region, a channel structure upwardly protruding from the first source/drain region and configured to serve as a channel, the channel structure having a two-dimensional structure in a plan view, the channel structure having an opening at at least one side thereof, the channel structure including one or two first portions and one or more second portions, the one or two first portion extending in a first direction, and the one or more second portions connected to corresponding one or more of the one or more first portions and extending in a second direction, the second direction being different from the first direction, a gate structure horizontally surrounding the channel structure, and a second source/drain region upwardly on the channel structure may be provided.

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