Abstract:
Magneto-impedance (MI) sensors employing current confinement and exchange bias layer(s) for increased MI sensitivity are disclosed. MI sensors may be used as biosensors to detect biological materials. The sensing by the MI devices is based on a giant magneto-impedance (GMI) effect, which is very sensitive to a magnetic field. The GMI effect is a change in impedance of a magnetic material resulting from a change in skin depth of the magnetic material as a function of an external direct current (DC) magnetic field applied to the magnetic material and an alternating current (AC) current flowing through the magnetic material (or adjacent conductive materials). Thus, this change in impedance resulting from a magnetic stray field generated by magnetic nanoparticles can be detected in lower concentrations and measured to determine the amount of magnetic nanoparticles present, and thus the target analyte of interest.
Abstract:
Exemplary features pertain to secure communications using Physical Unclonable Function (PUF) devices. Segments of a message to be encrypted are sequentially applied to a PUF device as a series of challenges to obtain a series of responses for generating a sequence of encryption keys, whereby a previous segment of the message is used to obtain a key for encrypting a subsequent segment of the message. The encrypted message is sent to a separate (receiving) device that employs a logical copy of the PUF device for decrypting the message. The logical copy of the PUF may be a lookup table or the like that maps all permissible challenges to corresponding responses for the PUF and may be generated in advance and stored in memory of the receiving device. The data to be encrypted may be further encoded to more fully exercise the PUF to enhance security. Decryption operations are also described.
Abstract:
In a particular aspect, an apparatus includes a magnetic random access memory (MRAM) cell including a pair of cross coupled inverters including a first inverter and a second inverter. The first inverter includes a first transistor coupled to a first node and a second transistor coupled to the first node. The second inverter includes a third transistor coupled to a second node and a fourth transistor coupled to the second node. The MRAM cell includes a first magnetic tunnel junction (MTJ) element coupled to the second transistor and a second MTJ element coupled to the fourth transistor. The apparatus further includes a voltage initialization circuit coupled to the MRAM cell. The voltage initialization circuit is configured to substantially equalize voltages of the first node and the second node in response to an initialization signal.
Abstract:
A semiconductor device includes a first magnetic tunnel junction (MTJ) device, a second MTJ device, and a top electrode. The first MTJ device includes a barrier layer. The second MTJ device includes the barrier layer. The top electrode is coupled to the first MTJ device and the second MTJ device.
Abstract:
Magnetic tunnel junction (MTJ) devices with a heterogeneous free layer structure particularly suited for efficient spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) are disclosed. In one aspect, a MTJ structure with a reduced thickness first pinned layer section provided below a first tunnel magneto-resistance (TMR) barrier layer is provided. The first pinned layer section includes one pinned layer magnetized in one magnetic orientation. In another aspect, a second pinned layer section and a second TMR barrier layer are provided above a free layer section and above the first TMR barrier layer in the MTJ. The second pinned layer is magnetized in a magnetic orientation that is anti-parallel (AP) to that of the first pinned layer section. In yet another aspect, the free layer comprises first and second heterogeneous layers separated by an anti-ferromagnetic coupling spacer, the first and second heterogeneous layers differing in their magnetic anisotropy.
Abstract:
An apparatus includes a perpendicular magnetic anisotropy magnetic tunnel junction (pMTJ) device. The pMTJ device includes a storage layer and a reference layer. The reference layer includes a portion configured to produce a ferrimagnetic effect. The portion includes a first layer, a second layer, and a third layer. The second layer is configured to antiferromagnetically (AF) couple the first layer and the third layer during operation of the pMTJ device.
Abstract:
A magnetic tunnel junction (MTJ) device includes a pinned layer, a tunnel barrier layer on the pinned layer, and a free layer on the tunnel barrier layer. The MTJ device also includes a perpendicular magnetic anisotropic (PMA) enhancement layer on the free layer, a capping layer on the PMA enhancement layer, and a conductive path electrically shorting the capping layer, the PMA enhancement layer and the free layer. A method of fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes forming a capping layer, a perpendicular magnetic anisotropic (PMA) enhancement layer and a free layer. The method also includes forming a conductive layer to short the capping layer, the PMA enhancement layer and the free layer.
Abstract:
A magnetic random access memory (MRAM) array including several bit cells is described. Each of the bit cells may include a perpendicular magnetic tunnel junction (pMTJ) including a reference layer, a barrier layer supporting the reference layer, and a free layer supporting the barrier layer. A spin-hall conductive material layer may support the free layer. A driver may be operable to set a state of at least one of the bit cells using an increased spin-transfer torque (STT) current and a spin-hall effect from the spin-hall conductive material layer. The increased STT current may be driven through the spin-hall conductive material layer and the pMTJ so that a spin current is generated from the reference layer and the spin-hall conductive material layer.
Abstract:
Magnetic tunnel junction (MTJ) memory bit cells that decouple source line layout from access transistor node size to facilitate reduced contact resistance are disclosed. In one example, an MTJ memory bit cell is provided that includes a source plate disposed above and in contact with a source contact for a source node of an access transistor. A source line is disposed above and in electrical contact with the source plate to electrically connect the source line to the source node. The source plate allows the source line to be provided in a higher metal level from the source and drain contacts of the access transistor such that the source line is not in physical contact with (i.e., decoupled from) the source contact. This allows pitch between the source line and drain column to be relaxed from the width of the source and drain nodes without having to increase contact resistance.
Abstract:
A method for fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes growing a seed layer on a first electrode of the pMTJ device. The seed layer has a uniform predetermined crystal orientation along a growth axis. The method also includes planarizing the seed layer while maintaining the uniform predetermined crystal orientation of the seed layer.