公开(公告)号：US20170374736A1

公开(公告)日：2017-12-28

申请号：US15698426

申请日：2017-09-07

Applicant: Ares Materials, Inc.

Inventor： Radu REIT ,  David ARREAGA-SALAS

IPC: H05K1/02 ,  H05K1/03 ,  H05K3/00

CPC classification number: H05K1/0283 ,  H01L27/1218 ,  H01L51/0097 ,  H05K1/0393 ,  H05K1/189 ,  H05K3/0014 ,  H05K3/0023 ,  H05K3/0055 ,  H05K2201/0141 ,  H05K2201/0187 ,  H05K2203/0143 ,  H05K2203/0796 ,  H05K2203/095 ,  H05K2203/1163 ,  H05K2203/1194 ,  H05K2203/1476 ,  H05K2203/1545

Abstract: A bulk substrate for stretchable electronics. The bulk substrate is manufactured with a process that forms a soft-elastic region of the bulk substrate. The soft-elastic region includes a strain capacity of greater than or equal to 25% and a first Young's modulus below 10% of a maximum local modulus of the bulk substrate. The process also forms a stiff-elastic region of the bulk substrate. The stiff-elastic region includes a strain capacity of less than or equal to 5% and a second Young's modulus greater than 10% of the maximum local modulus of the bulk substrate.

公开(公告)号：US09713266B2

公开(公告)日：2017-07-18

申请号：US14373961

申请日：2013-02-06

Applicant: Atotech Deutschland GmbH

Inventor： Richard Nichols ,  Don Jang ,  Harald Riebel ,  Frank Brüning

IPC: C25D5/56 ,  C25D7/00 ,  H05K3/38 ,  H05K3/42 ,  C25D5/02 ,  H05K3/46 ,  C23C18/40 ,  C25D7/06 ,  H05K3/06 ,  C23C18/16 ,  C23C18/20 ,  H05K3/10 ,  C25D3/38 ,  C23C18/30

CPC classification number: H05K3/387 ,  C23C18/1653 ,  C23C18/2006 ,  C23C18/2066 ,  C23C18/30 ,  C23C18/40 ,  C23C18/405 ,  C25D3/38 ,  C25D5/022 ,  C25D5/56 ,  C25D7/00 ,  C25D7/06 ,  H05K3/06 ,  H05K3/108 ,  H05K3/381 ,  H05K3/388 ,  H05K3/389 ,  H05K3/421 ,  H05K3/4644 ,  H05K2203/0789 ,  H05K2203/0793 ,  H05K2203/0796

Abstract: The present invention relates to a method for manufacture of fine line circuitry in the manufacture of printed circuit boards, IC substrates and the like. The method utilizes a first conductive layer on the smooth surface of a build-up layer and a second conductive layer selected from electrically conductive polymers, colloidal noble metals and electrically conductive carbon particles on the roughened walls of at least one opening which are formed after depositing the first conductive layer.

公开(公告)号：US20170130354A1

公开(公告)日：2017-05-11

申请号：US15127433

申请日：2015-03-12

Applicant: Atotech Deutschland GmbH

Inventor： Tadahiro NISHIGAWA ,  Jun HIGUCHI ,  Hitoshi ISHIKAWA

IPC: C25D5/34 ,  H05K1/02 ,  H05K3/42 ,  C25D3/38 ,  H05K3/46

CPC classification number: C25D5/34 ,  C25D3/38 ,  C25D5/56 ,  H05K1/0296 ,  H05K3/424 ,  H05K3/427 ,  H05K3/467 ,  H05K2201/032 ,  H05K2201/0329 ,  H05K2203/0793 ,  H05K2203/0796

Abstract: In a substrate like a printed circuit board comprising an insulator and a copper layer laminated on part of the insulator, the insulator outer surface and the copper layer outer surface are simultaneously subjected to (1) a process including treatment with an alkali metal hydroxide solution, (2) a process including treatment with an alkaline aqueous solution containing an aliphatic amine, (3) a process including treatment with an alkaline aqueous solution having a permanganate concentration of 0.3 to 3.5 wt % and a pH of 8 to 11, (4) a process including treatment with an acidic microemulsion aqueous solution containing a thiophene compound and an alkali metal salt of polystyrenesulphonic acid, and (5) a process including copper electroplating, which are implemented sequentially.

公开(公告)号：US09389503B2

公开(公告)日：2016-07-12

申请号：US14706564

申请日：2015-05-07

Applicant: FUJIFILM Corporation

Inventor： Tsukasa Tokunaga ,  Shin Tajiri ,  Makoto Sutou ,  Toshinari Fujii ,  Shinichi Nakahira ,  Kensuke Katagiri ,  Nozomu Tonoike

IPC: G03C1/047 ,  G03C1/053 ,  H05K3/00 ,  G03F7/004 ,  G03F7/20 ,  G03F7/16 ,  G03F7/40 ,  H05K3/10

CPC classification number: G03F7/0043 ,  G03C1/047 ,  G03C1/053 ,  G03C1/85 ,  G03C1/915 ,  G03C5/04 ,  G03C2001/0475 ,  G03C2001/0478 ,  G03F7/168 ,  G03F7/20 ,  G03F7/40 ,  G06F3/041 ,  G06F3/0416 ,  G06F3/044 ,  G06F2203/04103 ,  H05K1/092 ,  H05K3/105 ,  H05K3/106 ,  H05K3/28 ,  H05K3/381 ,  H05K3/386 ,  H05K2201/0215 ,  H05K2201/0769 ,  H05K2203/0796 ,  H05K2203/162

Abstract: A manufacturing method of a conductive sheet includes: a step A of forming a silver halide-containing photosensitive layer, which contains silver halide, gelatin, and a polymer different from the gelatin and in which a mass ratio (Y/X) of a mass Y of the polymer to a mass X of the gelatin is equal to or greater than 0.1, on a support; a step B of forming conductive portions containing metal silver by performing exposure and then development treatment on the silver halide-containing photosensitive layer; and a step C of treating the support having the conductive portions with an oxidant which has a standard electrode potential of equal to or greater than +1.5 V and decomposes the gelatin.

Abstract translation: 导电片的制造方法包括：形成含有卤化银，明胶和不同于明胶的聚合物的含卤化银的感光层的步骤A，其中质量比（Y / X） 在支持体上聚合物相对于明胶质量X的Y等于或大于0.1; 通过对含有卤化银的感光层进行曝光，然后显影处理，形成含有金属银的导电部分的工序B; 以及步骤C，用标准电极电位等于或大于+ 1.5V的氧化剂处理具有导电部分的载体并分解明胶。

公开(公告)号：US20140339463A1

公开(公告)日：2014-11-20

申请号：US14345618

申请日：2012-09-11

Applicant: Yoshikazu Saijo ,  Hisamitsu Yamamoto ,  Masayuki Utsumi

Inventor： Yoshikazu Saijo ,  Hisamitsu Yamamoto ,  Masayuki Utsumi

IPC: C09K13/02 ,  H05K3/00

CPC classification number: C09K13/02 ,  H05K3/0055 ,  H05K3/381 ,  H05K2203/0793 ,  H05K2203/0796

Abstract: The present invention provides a desmear solution and a desmear method using said desmear solution, the desmear solution being capable of certainly removing a smear inside a non-through hole formed in a resin substrate and also capable of forming a plating film excellent in adhesion without excessive roughening of a surface of the resin substrate. The present invention uses the desmear solution containing a permanganate having a concentration of 0.2 to 0.4 mol/L and an alkali metal hydroxide and having a molar concentration ratio of said permanganate to said alkali metal hydroxide of 1:5 to 1:20.

Abstract translation: 本发明提供一种使用所述去污溶液的去污解决方案和去污方法，所述去污溶液能够可靠地除去形成在树脂基材中的非通孔内的污迹，并且还能够形成无粘附性优异的电镀膜 使树脂基板的表面粗糙化。 本发明使用含有浓度为0.2〜0.4mol / L的高锰酸盐和碱金属氢氧化物并且所述高锰酸盐与所述碱金属氢氧化物的摩尔浓度比为1:5〜1:20的去污溶液。

公开(公告)号：US08663484B2

公开(公告)日：2014-03-04

申请号：US12452479

申请日：2008-06-23

Applicant: Harumi Nagao ,  Yoshiyuki Asakawa

Inventor： Harumi Nagao ,  Yoshiyuki Asakawa

IPC: H01B13/00

CPC classification number: H05K3/067 ,  C23F1/26 ,  C23F1/28 ,  H05K1/0393 ,  H05K3/26 ,  H05K3/388 ,  H05K2201/0761 ,  H05K2203/0796 ,  Y10T428/12569 ,  Y10T428/31681

Abstract: A method for manufacturing a printed circuit board enables a metal residue between wirings to be removed inexpensively without side etching of a copper layer while having sufficient insulation reliability for micro wiring working. The method includes forming a base metal layer directly at least on one face of an insulator film without an adhesive, and a copper coat layer formed on the base metal layer to form adhesiveless copper clad laminates, then forming a pattern on the adhesiveless copper clad laminates by an etching method. The etching method includes a process of etching treatment for the adhesiveless copper clad laminates with an iron (III) chloride solution or a copper (II) chloride solution containing hydrochloric acid and then, a process of treatment with an acid oxidant containing potassium permanganate.

Abstract translation: 印刷电路板的制造方法能够廉价地除去布线之间的金属残留物，而不会对铜层进行侧蚀刻，同时具有足够的微布线工作的绝缘可靠性。 该方法包括直接在绝缘膜的至少一个表面上形成基底金属层，而无需粘合剂，以及形成在基底金属层上的铜涂层，以形成无粘合剂的铜包覆层压板，然后在无粘合剂覆铜层压板上形成图案 通过蚀刻方法。 蚀刻方法包括用氯化铁（III）溶液或含有盐酸的氯化铜（II）溶液对无粘合剂覆铜层压板进行蚀刻处理的方法，然后使用含有高锰酸钾的酸式氧化剂进行处理。

公开(公告)号：US20130105206A1

公开(公告)日：2013-05-02

申请号：US13616804

申请日：2012-09-14

Applicant: Jae Il KIM ,  Jong Young Lee ,  Sang Hwa Kim

Inventor： Jae Il KIM ,  Jong Young Lee ,  Sang Hwa Kim

IPC: H05K1/09 ,  B05D5/12

CPC classification number: G06F3/044 ,  G06F3/045 ,  G06F2203/04103 ,  H05K3/06 ,  H05K2201/0329 ,  H05K2203/0796

Abstract: There are provided a transparent panel and a method of manufacturing the same. The transparent panel includes: a transparent substrate; a conductive polymer layer formed over the entirety of a surface of the transparent substrate; and a refractive index matching layer formed in at least some regions of the conductive polymer layer, wherein the at least some regions in which the refractive index matching layer is formed correspond to regions in which electrical conductivity is inactivated in the conductive polymer layer. According to the present invention, the conductive polymer layer is formed on at least one surface of the transparent substrate and the electrical conductivity is inactivated in at least some regions of the conductive polymer layer to form sensing electrodes having a predetermined pattern, and the refractive index matching layer is formed in the at least some regions in which the electrical conductivity is inactivated.

Abstract translation: 提供透明面板及其制造方法。 透明面板包括：透明基板; 在所述透明基板的整个表面上形成的导电聚合物层; 以及形成在导电聚合物层的至少一些区域中的折射率匹配层，其中形成折射率匹配层的至少一些区域对应于导电聚合物层中导电性失活的区域。 根据本发明，在透明基板的至少一个表面上形成导电聚合物层，并且在导电聚合物层的至少一些区域中导电性失活以形成具有预定图案的感测电极，折射率 匹配层形成在导电性失活的至少一些区域中。

公开(公告)号：US20130048598A1

公开(公告)日：2013-02-28

申请号：US13527751

申请日：2012-06-20

Applicant: Emi USHIODA ,  Tetsuo IMAI

Inventor： Emi USHIODA ,  Tetsuo IMAI

IPC: H05K3/10 ,  C23F1/10

CPC classification number: C23G1/103 ,  C23C18/1216 ,  C23C18/1651 ,  C23C18/1844 ,  C23C22/52 ,  C23C22/63 ,  C23G1/20 ,  H05K1/0306 ,  H05K3/1291 ,  H05K3/246 ,  H05K2203/0796

Abstract: Provided is a plating method of a circuit substrate comprising a conductive pattern in which a metal layer containing at least silver and copper is exposed on an outer surface. The plating method comprises: step (A) of treating the circuit substrate with a first liquid agent containing an oxidizing agent; step (B) of treating the circuit substrate after the step (A) with a second liquid agent which dissolves copper oxide, and thereby removing copper oxide from the conductive pattern's surface; step (C) of treating the circuit substrate after the step (B) with a third liquid agent whose rate of dissolving silver oxide (I) at 25° C. is 1000 times or more faster than its rate of dissolving copper (0) at 25° C., and thereby removing silver oxide from the conductive pattern's surface; and step (D) of performing electroless plating on the conductive pattern of the circuit substrate after the step (C).

Abstract translation: 提供一种电路基板的电镀方法，该电路基板包括导体图案，其中至少含有银和铜的金属层在外表面上露出。 电镀方法包括：用含有氧化剂的第一液体试剂处理电路基板的工序（A） 在步骤（A）之后用溶解氧化铜的第二液体试剂处理电路基板的步骤（B），从而从导电图案的表面除去氧化铜; 在步骤（B）之后用第三液体试剂处理电路基板的步骤（C），其中溶解氧化银（I）在25℃下的速率比其溶解铜（0）的速率快1000倍或更快 25℃，从而从导电图案的表面除去氧化银; 以及在步骤（C）之后在电路基板的导电图案上进行无电镀的步骤（D）。

公开(公告)号：US20120167916A1

公开(公告)日：2012-07-05

申请号：US13395201

申请日：2010-09-24

Applicant: Yoshikazu Saijo ,  Hisamitsu Yamamoto ,  Masayuki Utsumi

Inventor： Yoshikazu Saijo ,  Hisamitsu Yamamoto ,  Masayuki Utsumi

IPC: B08B3/08 ,  C11D7/60

CPC classification number: H05K3/0055 ,  H05K2203/0796 ,  H05K2203/122

Abstract: Disclosed is a neutralizing/reducing agent for neutralizing/reducing an oxidizing agent component that is adsorbed and remains on an object to be coated after the object is subjected to a desmear treatment with the oxidizing agent, which comprises a thioamide compound and a non-aromatic thiol compound. The neutralizing/reducing agent does not generate any gas during a neutralization/reduction treatment, and therefore the occurrence of defects caused by the neutralization/reduction on the surface of a through hole or a blind via hole can be prevented. Further, the neutralizing/reducing agent hardly dissolves copper, and therefore the occurrence of haloing can be prevented, and the blistering caused by the etching between an inner layer copper and a resin with the neutralizing/reducing agent can also be prevented.

Abstract translation: 公开了一种用于中和/还原氧化剂组分的中和/还原剂，该氧化剂组分在物体被氧化剂进行去污处理之后被吸附并保留在待涂覆的物体上，该氧化剂包括硫代酰胺化合物和非芳族化合物 硫醇化合物。 中和/还原剂在中和/还原处理期间不产生任何气体，因此可以防止由通孔或盲通孔的表面上的中和/还原引起的缺陷的发生。 此外，中和还原剂几乎不溶解铜，因此可以防止卤化的发生，并且还可以防止由内层铜和具有中和/还原剂的树脂之间的腐蚀引起的起泡。

公开(公告)号：US08192636B2

公开(公告)日：2012-06-05

申请号：US12090990

申请日：2006-10-23

Applicant: Dirk Tews ,  Christian Sparing

Inventor： Dirk Tews ,  Christian Sparing

IPC: H01L21/306 ,  C09K13/00

CPC classification number: H05K3/383 ,  C23F1/18 ,  C23F1/46 ,  C23F3/06 ,  C23G1/103 ,  H05K2203/0796 ,  H05K2203/124

Abstract: The present invention relates to a method for treating copper or copper alloy surfaces for tight bonding to polymeric substrates, for example solder masks found in multilayer printed circuit boards. The substrate generally is a semiconductor-device, a lead frame or a printed circuit board.

Abstract translation: 本发明涉及一种用于处理铜或铜合金表面以紧密粘合到聚合物基材上的方法，例如在多层印刷电路板中发现的焊接掩模。 基板通常是半导体器件，引线框架或印刷电路板。