-
公开(公告)号：US09622341B2
公开(公告)日：2017-04-11
申请号：US14809714
申请日：2015-07-27
发明人： Reinhold Bayerer
CPC分类号： H05K1/0256 , H01L23/04 , H01L2924/0002 , H05K1/18 , H05K1/181 , H05K3/30 , H05K3/306 , H05K2201/0761 , H05K2201/09036 , H05K2201/10166 , H05K2201/10303 , H05K2201/2036 , H01L2924/00
摘要： A power semiconductor module includes a module housing having a top side, a first terminal group, and a second terminal group. A circuit board, which has a first electrode and a second electrode, is mountable on the power semiconductor module in such a way that in the mounted state each terminal of the first group is electrically conductively connected to the first electrode and each terminal of the second group is electrically conductively connected to the second electrode. A first isolation web and/or a second isolation web is provided. Each isolation web is fixed to the circuit board even in the unmounted state, and arranged between the first terminal group and the second terminal group in the mounted state.
-
公开(公告)号：US09545012B2
公开(公告)日：2017-01-10
申请号：US14647807
申请日：2013-01-11
发明人： Che-chang Hu , Kuang-Yao Chang , Qian Cao
CPC分类号： H05K3/02 , F21V29/70 , H05K1/056 , H05K2201/0761 , H05K2201/10106 , H05K2203/0228 , H05K2203/302
摘要： A method for manufacturing a printed circuit board of a backlight module is provided. The printed circuit board includes a light bar region and a heat dissipating region. The light bar region used for mounting a light bar of the backlight module and formed with a conductive circuit for supplying power for the light bar. The heat dissipating region is connected with the light bar region. A connection location of the light bar region and the heat dissipating region is subjected to cutting to form a slot located at a side of the printed circuit board in order to prevent short-circuiting between the heat dissipating region and the conductive circuit of the light bar region. The cutting is made to partly penetrate through the thickness of a dielectric layer on which the conductive circuit is formed in order to completely separate the light bar region from the heat dissipating region.
摘要翻译： 提供一种用于制造背光模块的印刷电路板的方法。 印刷电路板包括光条区域和散热区域。 用于安装背光模块的光棒并形成有用于为光棒供电的导电电路的光条区域。 散热区域与光条区域连接。 对光棒区域和散热区域的连接位置进行切割以形成位于印刷电路板侧的狭槽，以防止散热区域与光条的导电电路之间的短路 地区。 切割部分地穿透其上形成有导电电路的电介质层的厚度，以便将光条区域与散热区域完全分离。
-
3.发明申请Copper Interconnect Device Including Surface Functionalized Graphene Capping Layer and Fabrication Method Thereof 审中-公开包括表面官能化石墨烯封盖层的铜互连器件及其制造方法公开(公告)号：US20160270237A1
公开(公告)日：2016-09-15
申请号：US15063497
申请日：2016-03-07
CPC分类号： H05K3/285 , H01L21/0331 , H01L21/76834 , H01L21/76849 , H01L21/76852 , H01L23/53238 , H05K1/0306 , H05K3/107 , H05K2201/0341 , H05K2201/0761 , H05K2201/0769 , H05K2203/095 , H05K2203/1361 , H05K2203/1366
摘要： Disclosed is a copper interconnection device including a surface-functionalized graphene capping layer and a method of fabricating the same, wherein electromigration of a fine copper interconnection can be suppressed by the capping layer having a thickness of ones of nm or less. Specifically, graphene is surface-functionalized to possess functional groups able to chemically interact with copper atoms and is thus used as the capping layer, whereby it is difficult to move the copper atoms through the chemical interaction with the functional groups by the use of only the capping layer as thin as ones of nm or less, effectively suppressing electromigration of the copper interconnection.
摘要翻译： 公开了一种包括表面官能化石墨烯覆盖层的铜互连装置及其制造方法，其中可以通过具有nm以下的厚度的覆盖层来抑制细铜互连的电迁移。 具体地，石墨烯被表面官能化以具有能够与铜原子化学相互作用的官能团，因此被用作封盖层，由此难以使铜原子通过与官能团的化学相互作用而移动，仅使用 覆盖层薄到nm以下，有效地抑制铜互连的电迁移。
-
4.发明授权公开(公告)号：US08569631B2
公开(公告)日：2013-10-29
申请号：US13101908
申请日：2011-05-05
IPC分类号： H05K1/03
CPC分类号： H05K1/023 , H05K1/0216 , H05K1/0366 , H05K3/308 , H05K3/4046 , H05K3/4608 , H05K2201/0323 , H05K2201/0761 , H05K2201/10939 , H05K2203/1453
摘要： A noise dampening energy efficient circuit board includes a carbon material layer for dampening electromagnetic interference between surface mount components and trace patterns of the circuit board. One or more ground plane layers are arranged relative to the carbon material layer to cooperatively dampen and repel noise of varying frequencies. The positioning of the carbon material layer with respect to the ground plane layer enhances the ground plane operation. Glass fiber material layers and other insulating dielectric layers are disposed at particular locations within the noise dampening energy efficient circuit board. The carbon material layer and the ground plane layer dampen electromagnetic noise, thereby permitting energy saving design considerations, increasing energy efficiencies and reducing power consumption. Mounting posts of the surface mount components include insulating sleeves to selectively insulate different layers of the circuit board from surface mount components. Methods for constructing and using the circuit board are also disclosed.
摘要翻译： 噪声抑制能效电路板包括用于抑制表面安装部件和电路板的迹线图案之间的电磁干扰的碳材料层。 相对于碳材料层布置一个或多个接地层，以协同地抑制和排斥变化频率的噪声。 碳材料层相对于接地层的定位增强了接地层的操作。 玻璃纤维材料层和其它绝缘电介质层设置在噪声抑制能效电路板内的特定位置。 碳材料层和接地层可抑制电磁噪声，从而节省设计考虑因素，提高能源效率并降低功耗。 表面安装部件的安装柱包括绝缘套管，以选择性地将电路板的不同层与表面安装部件绝缘。 还公开了构造和使用电路板的方法。
-
5.发明申请Systems and Methods for Obtaining Large Creepage Isolation on Printed Circuit Boards 有权在印刷电路板上获得大的爬电隔离的系统和方法公开(公告)号：US20130269982A1
公开(公告)日：2013-10-17
申请号：US13446783
申请日：2012-04-13
申请人： Dejan Teofilovic
发明人： Dejan Teofilovic
IPC分类号： H01B17/60
CPC分类号： H05K1/0256 , H05K1/0227 , H05K2201/0761 , H05K2201/09781 , H05K2201/09972 , H05K2201/10121
摘要： An electrical circuit with large creepage isolation distances is provided. In some embodiments, the electrical circuit is capable of increasing creepage isolation distances by many multiples over traditional electrical circuits. In one embodiment, an electrical circuit comprises a ground circuit optically coupled to a floating circuit, and an isolated circuit optically coupled to the floating circuit. The circuits can be optically coupled with opto-isolators, for example. The isolated circuit can have a creepage isolation distance at least twice as large as a traditional circuit. In some embodiments, “n” number of floating circuits can be optically coupled between the ground circuit and the isolated circuit to increase the total creepage isolation distance by a factor of “n”. Methods of use are also described.
摘要翻译： 提供了具有大爬电隔离距离的电路。 在一些实施例中，电路能够在传统电路上增加多个倍数的爬电隔离距离。 在一个实施例中，电路包括光耦合到浮置电路的接地电路和与浮动电路光耦合的隔离电路。 例如，电路可以与光隔离器光学耦合。 隔离电路的爬电隔离距离至少为传统电路的两倍。 在一些实施例中，“n”个浮动电路可以在接地电路和隔离电路之间光学耦合，以将总爬电隔离距离提高因子“n”。 还描述了使用方法。
-
6.发明授权公开(公告)号：US08465656B2
公开(公告)日：2013-06-18
申请号：US12733105
申请日：2008-06-23
申请人： Harumi Nagao , Yoshiyuki Asakawa , Kenji Ikeuchi
发明人： Harumi Nagao , Yoshiyuki Asakawa , Kenji Ikeuchi
IPC分类号： H01B13/00
CPC分类号： H05K3/067 , C23C22/52 , C23C22/58 , C23F1/18 , C23F1/28 , H05K3/26 , H05K3/388 , H05K2201/0338 , H05K2201/0761 , H05K2203/0796
摘要： A method for manufacturing a printed circuit board enables a metal residue between wirings to be removed inexpensively without side etching of a copper layer while having sufficient insulation reliability for micro wiring working. The method includes forming a base metal layer directly at least on one face of an insulator film without an adhesive, and a copper coat layer formed on the base metal layer to form adhesiveless copper clad laminates, then forming a pattern on the adhesiveless copper clad laminates by an etching method. The etching method includes a process of etching treatment for the adhesiveless copper clad laminates with an iron (III) chloride solution or a copper (II) chloride solution containing hydrochloric acid and then, a process of treatment with an acid oxidant containing permanganate and acetic acid.
摘要翻译： 印刷电路板的制造方法能够廉价地除去布线之间的金属残留物，而不会对铜层进行侧蚀刻，同时具有足够的微布线工作的绝缘可靠性。 该方法包括直接在绝缘膜的至少一个表面上形成基底金属层而无需粘合剂，以及形成在基底金属层上的铜涂层，以形成无粘合剂的铜包覆层压材料，然后在无粘合剂的铜箔层压板上形成图案 通过蚀刻方法。 蚀刻方法包括用氯化铁（III）溶液或含有盐酸的氯化铜（II）溶液对无粘合剂铜包覆层压板进行蚀刻处理的方法，然后使用含有高锰酸盐和乙酸的酸式氧化剂进行处理 。
-
7.发明申请NOISE DAMPENING ENERGY EFFICIENT CIRCUIT BOARD AND METHOD FOR CONSTRUCTING AND USING SAME 有权噪声抑制能源有效电路板及其构造和使用方法公开(公告)号：US20110209909A1
公开(公告)日：2011-09-01
申请号：US13101908
申请日：2011-05-05
CPC分类号： H05K1/023 , H05K1/0216 , H05K1/0366 , H05K3/308 , H05K3/4046 , H05K3/4608 , H05K2201/0323 , H05K2201/0761 , H05K2201/10939 , H05K2203/1453
摘要： A noise dampening energy efficient circuit board includes a carbon material layer for dampening electromagnetic interference between surface mount components and trace patterns of the circuit board. One or more ground plane layers are arranged relative to the carbon material layer to cooperatively dampen and repel noise of varying frequencies. The positioning of the carbon material layer with respect to the ground plane layer enhances the ground plane operation. Glass fiber material layers and other insulating dielectric layers are disposed at particular locations within the noise dampening energy efficient circuit board. The carbon material layer and the ground plane layer dampen electromagnetic noise, thereby permitting energy saving design considerations, increasing energy efficiencies and reducing power consumption. Mounting posts of the surface mount components include insulating sleeves to selectively insulate different layers of the circuit board from surface mount components. Methods for constructing and using the circuit board are also disclosed.
摘要翻译： 噪声抑制能效电路板包括用于抑制表面安装部件和电路板的迹线图案之间的电磁干扰的碳材料层。 相对于碳材料层布置一个或多个接地层，以协同地抑制和排斥变化频率的噪声。 碳材料层相对于接地层的定位增强了接地层的操作。 玻璃纤维材料层和其它绝缘电介质层设置在噪声抑制能效电路板内的特定位置。 碳材料层和接地层可抑制电磁噪声，从而节省设计考虑因素，提高能源效率并降低功耗。 表面安装部件的安装柱包括绝缘套管，以选择性地将电路板的不同层与表面安装部件绝缘。 还公开了构造和使用电路板的方法。
-
公开(公告)号：US07744717B2
公开(公告)日：2010-06-29
申请号：US11789842
申请日：2007-04-25
申请人： Gerald Donald Andrews , Richard Kevin Bailey , Graciela Beatriz Blanchet , John W. Catron , Feng Gao , Gary Delmar Jaycox , Lynda Kaye Johnson , Roupen Leon Keusseyan , Jeffrey Scott Meth , Frank S. Principe , Rinaldo S. Schiffino , Robert Mar Yohannan
发明人： Gerald Donald Andrews , Richard Kevin Bailey , Graciela Beatriz Blanchet , John W. Catron , Feng Gao , Gary Delmar Jaycox , Lynda Kaye Johnson , Roupen Leon Keusseyan , Jeffrey Scott Meth , Frank S. Principe , Rinaldo S. Schiffino , Robert Mar Yohannan
CPC分类号： B41M5/38207 , B41M5/38214 , H01L51/0013 , H01L51/0052 , H01L51/0068 , H01L51/052 , H01L51/0545 , H05K3/046 , H05K3/26 , H05K2201/0761 , H05K2203/0191 , H05K2203/0528 , H05K2203/107
摘要： Provided are processes for enhancing the resolution of a thermally transferred pattern on an imaged thermal transfer receiver, wherein the imaged thermal transfer receiver comprises a surface having an exposed portion and a non-exposed portion of one or more thermally transferred layer(s), comprising: (a) contacting said surface with an adhesive layer for a contact period to provide a laminate; (b) separating said adhesive layer from the laminate to provide a treated thermal transfer receiver having a surface substantially free of said non-exposed portion of one or more thermally transferred layer(s). The processes are useful in the fabrication of electronic devices including thin film transistors, circuits, electromagnetic interference shields, touchpad sensors and other electronic devices.
摘要翻译： 提供了用于增强成像的热转印接收器上的热转印图案的分辨率的方法，其中成像的热转印接收器包括具有一个或多个热转印层的暴露部分和未曝光部分的表面，包括 ：（a）使所述表面与粘合剂层接触接触期以提供层压体; （b）从所述层压体分离所述粘合剂层以提供经处理的热转印接收器，其具有基本上不含一个或多个热转移层的所述未曝光部分的表面。 这些方法在制造包括薄膜晶体管，电路，电磁干扰屏蔽，触摸板传感器和其它电子设备的电子器件中是有用的。
-
公开(公告)号：US07476328B2
公开(公告)日：2009-01-13
申请号：US11317596
申请日：2005-12-23
申请人： Takashi Oda
发明人： Takashi Oda
IPC分类号： H01B13/00
CPC分类号： C25D5/022 , H05K1/0346 , H05K3/108 , H05K3/26 , H05K2201/0761 , H05K2203/095
摘要： A printed circuit board having prescribed conductive patterns formed on an insulating layer is provided about 20 mm apart from an AC electrode provided in a plasma etching device. An earth electrode is provided on the side opposing the AC electrode. More specifically, the printed circuit board is provided outside a sheath layer that is a region having a high plasma density generated in the vicinity of the AC electrode. The frequency of an AC power supply is preferably not more than 1 GHz. The pressure in the device is preferably in the range from 1.33×10−2 Pa to 1.33×102 Pa. The inter-electrode distance between the AC electrode and the earth electrode is preferably not more than 150 mm, more preferably from 40 mm to 100 mm.
摘要翻译： 在绝缘层上形成具有规定导电图案的印刷电路板，与设置在等离子体蚀刻装置中的AC电极间隔开大约20mm。 在与AC电极相对的一侧设置接地电极。 更具体地，印刷电路板设置在作为在交流电极附近产生的具有高等离子体密度的区域的皮层之外。 交流电源的频率优选为1GHz以下。 装置中的压力优选为1.33×10 -2 Pa〜1.33×102Pa的范围，AC电极和接地电极之间的电极间距离优选为150mm以下，更优选为40mm〜100mm 。
-
公开(公告)号：US20080265669A1
公开(公告)日：2008-10-30
申请号：US11988733
申请日：2006-07-12
申请人： Etienne Suzzoni
发明人： Etienne Suzzoni
CPC分类号： H05K1/0201 , H05K1/0268 , H05K1/181 , H05K2201/0761 , H05K2201/10151 , H05K2201/10689 , H05K2201/10969
摘要： The invention relates to a printed circuit (10) comprising a support (12) that is insulating under normal conditions of operation of the printed circuit (10). The printed circuit (1) carries at least one component (14) that is capable of accidentally causing undesirable heating of a sensitive zone (Z) of the support (12). For this purpose, the printed circuit (10) further includes detector means for detecting heating of the sensitive zone (Z). The detector means comprise means (26) that are sensitive to the increase in the conductivity of the support (12) with temperature.
摘要翻译： 本发明涉及一种印刷电路（10），包括在印刷电路（10）的正常操作条件下绝缘的支撑件（12）。 印刷电路（1）承载能够意外地引起支撑件（12）的敏感区域（Z）的不期望的加热的至少一个部件（14）。 为此目的，印刷电路（10）还包括用于检测敏感区（Z）的加热的检测器装置。 检测器装置包括对于温度对支撑件（12）的电导率的增加敏感的装置（26）。
-
-
-
-
-
-
-
-
-
搜索结果
152 条记录 (耗时 0.024 秒)
