公开(公告)号：US09589926B2

公开(公告)日：2017-03-07

申请号：US14931772

申请日：2015-11-03

Applicant: Fuji Electric Co., Ltd.

Inventor： Shoji Sakaguchi

IPC: B23K26/00 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L24/83 ,  H01L21/6835 ,  H01L23/4827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/741 ,  H01L24/93 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/50 ,  H01L29/417 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2224/03001 ,  H01L2224/03002 ,  H01L2224/03009 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/04026 ,  H01L2224/0508 ,  H01L2224/05083 ,  H01L2224/051 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05173 ,  H01L2224/05176 ,  H01L2224/05255 ,  H01L2224/0539 ,  H01L2224/05393 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05755 ,  H01L2224/0589 ,  H01L2224/05893 ,  H01L2224/291 ,  H01L2224/741 ,  H01L2224/83203 ,  H01L2224/83385 ,  H01L2224/83894 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01046 ,  H01L2924/01005 ,  H01L2924/01028 ,  H01L2924/01074 ,  H01L2924/0105 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01006

Abstract: A method of manufacturing a semiconductor device that includes: preparing a pair of substrates that respectively include a device structure on one primary surface or another primary surface thereof; stacking the substrates so that said one primary surfaces face each other, exposing said another surfaces to the outside, and fixing entire peripheral outer edges of the substrates that have been stacked to each other; and thereafter, plating said exposed another primary surfaces of the stacked and fixed substrates.

Abstract translation: 一种制造半导体器件的方法，包括：在一个主表面或另一个主表面上制备分别包括器件结构的一对衬底; 堆叠基板，使得所述一个主表面彼此面对，将所述另一表面暴露于外部，并且固定彼此堆叠的基板的整个周边外边缘; 然后电镀所述被堆叠和固定的基板的另一个主表面。

公开(公告)号：US20160181224A1

公开(公告)日：2016-06-23

申请号：US14931772

申请日：2015-11-03

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Shoji SAKAGUCHI

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/83 ,  H01L21/6835 ,  H01L23/4827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/741 ,  H01L24/93 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/50 ,  H01L29/417 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2224/03001 ,  H01L2224/03002 ,  H01L2224/03009 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/04026 ,  H01L2224/0508 ,  H01L2224/05083 ,  H01L2224/051 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05173 ,  H01L2224/05176 ,  H01L2224/05255 ,  H01L2224/0539 ,  H01L2224/05393 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05755 ,  H01L2224/0589 ,  H01L2224/05893 ,  H01L2224/291 ,  H01L2224/741 ,  H01L2224/83203 ,  H01L2224/83385 ,  H01L2224/83894 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01046 ,  H01L2924/01005 ,  H01L2924/01028 ,  H01L2924/01074 ,  H01L2924/0105 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01006

Abstract: A method of manufacturing a semiconductor device that includes: preparing a pair of substrates that respectively include a device structure on one primary surface or another primary surface thereof; stacking the substrates so that said one primary surfaces face each other, exposing said another surfaces to the outside, and fixing entire peripheral outer edges of the substrates that have been stacked to each other; and thereafter, plating said exposed another primary surfaces of the stacked and fixed substrates.

Abstract translation: 一种制造半导体器件的方法，包括：在一个主表面或另一个主表面上制备分别包括器件结构的一对衬底; 堆叠基板，使得所述一个主表面彼此面对，将所述另一表面暴露于外部，并且固定彼此堆叠的基板的整个周边外边缘; 然后电镀所述被堆叠和固定的基板的另一个主表面。

公开(公告)号：US20170271285A1

公开(公告)日：2017-09-21

申请号：US15072655

申请日：2016-03-17

Applicant: GLOBALFOUNDRIES INC.

Inventor： Richard S. Graf ,  Kibby B. Horsford ,  Sudeep Mandal

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0332 ,  H01L2224/03464 ,  H01L2224/0362 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/0519 ,  H01L2224/0529 ,  H01L2224/05339 ,  H01L2224/05344 ,  H01L2224/05347 ,  H01L2224/05355 ,  H01L2224/0539 ,  H01L2224/05444 ,  H01L2224/05455 ,  H01L2224/05564 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1319 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01005 ,  H01L2924/01015

Abstract: A conductive polymer-solder ball structure is provided. The conductive polymer-solder ball structure includes a wafer having at least one metal pad providing an electrical conductive path to a substrate layer, a conductive polymer pad located directly on the wafer over the at least one metal pad, an electrolessly plated layer located on a surface of the conductive polymer pad, and a solder ball located on a surface of the electrolessly plated layer.