公开(公告)号：US11751338B1

公开(公告)日：2023-09-05

申请号：US17706023

申请日：2022-03-28

Applicant: Vicor Corporation

Inventor： Patrizio Vinciarelli ,  Michael B. LaFleur ,  Sean Timothy Fleming ,  Rudolph F. Mutter ,  Andrew T. D'Amico

IPC: H05K3/28 ,  H05K1/11 ,  H05K5/06 ,  H05K5/02 ,  H05K1/18 ,  H05K1/02 ,  H05K5/04 ,  B23P15/00 ,  H01F27/28 ,  H05K3/00 ,  H05K5/00 ,  B29C45/00 ,  H01F27/24 ,  H05K7/14 ,  H05K7/20 ,  H01R27/02 ,  B29C45/14 ,  H01R43/24 ,  H01R43/20 ,  B29C45/16 ,  B29K63/00

CPC classification number: H05K3/284 ,  B23P15/007 ,  B29C45/0055 ,  B29C45/14639 ,  B29C45/1679 ,  H01F27/24 ,  H01F27/2804 ,  H01R27/02 ,  H01R43/205 ,  H01R43/24 ,  H05K1/0298 ,  H05K1/11 ,  H05K1/111 ,  H05K1/115 ,  H05K1/18 ,  H05K1/181 ,  H05K1/186 ,  H05K3/007 ,  H05K3/0044 ,  H05K3/0052 ,  H05K5/0004 ,  H05K5/0065 ,  H05K5/0217 ,  H05K5/0247 ,  H05K5/04 ,  H05K5/064 ,  H05K5/065 ,  H05K7/1427 ,  H05K7/209 ,  B29C2045/0058 ,  B29C2045/169 ,  B29C2793/009 ,  B29C2793/0009 ,  B29C2793/0027 ,  B29K2063/00 ,  H01F2027/2809 ,  H05K1/0209 ,  H05K2201/0183 ,  H05K2201/066 ,  H05K2201/10303 ,  H05K2201/10545 ,  H05K2203/1316 ,  H05K2203/1327 ,  H05K2203/167 ,  Y10T29/4913 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49158

Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects. Wide cuts may be made in the molds after encapsulation reducing thermal stresses and reducing the thickness of material to be cut during subsequent singulation. External mold features can include various fin configurations for heat sinks, flat surfaces for surface mounting or soldering, etc. Blank mold panels may be machined to provide some or all of the above features in an on-demand manufacturing system. Connection adapters may be provided to use the modules in vertical or horizontal mounting positions in connector, through-hole, surface-mount solder variations. The interconnects may be plated to provide a connectorized module that may be inserted into a mating connector.

公开(公告)号：US12096549B1

公开(公告)日：2024-09-17

申请号：US17582734

申请日：2022-01-24

Applicant: Vicor Corporation

Inventor： Patrizio Vinciarelli ,  Patrick R. Lavery ,  Rudolph F. Mutter ,  Jeffery J. Kirk ,  Andrew T. D'Amico

IPC: H05K1/02 ,  H01L23/053 ,  H01L23/057 ,  H01L23/28 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/16 ,  H05K3/18 ,  H05K3/20 ,  H05K3/24 ,  H05K3/38 ,  H01L21/44 ,  H01L23/14

CPC classification number: H05K1/0204 ,  H05K1/111 ,  H05K1/181 ,  H05K1/186 ,  H05K3/0014 ,  H05K3/0026 ,  H05K3/0044 ,  H05K3/0079 ,  H05K3/16 ,  H05K3/18 ,  H05K3/207 ,  H05K3/24 ,  H05K3/381 ,  H01L21/44 ,  H01L23/053 ,  H01L23/057 ,  H01L23/147 ,  H01L23/28 ,  H05K2201/1003 ,  Y10T29/49146

Abstract: Electronic modules having complex contact structures may be formed by encapsulating panels containing pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within the panel along the cut lines. Holes defining contact regions along the electronic module sidewall may be cut into the panel along the cut lines to expose the buried interconnects. The panel may be metallized, e.g. by a series or processes including plating, on selected surfaces including in the holes to form the contacts and other metal structures followed by cutting the panel along the cut lines to singulate the individual electronic models. The contacts may be located in a conductive grove providing a castellated module.

公开(公告)号：US11324107B1

公开(公告)日：2022-05-03

申请号：US16705585

申请日：2019-12-06

Applicant: Vicor Corporation

Inventor： Patrizio Vinciarelli ,  Patrick R. Lavery ,  Rudolph F. Mutter ,  Jeffery J. Kirk ,  Andrew T. D'Amico

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/24 ,  H05K3/38 ,  H05K3/18 ,  H05K3/16 ,  H05K3/20 ,  H05K1/11 ,  H01L21/44 ,  H01L23/28 ,  H01L23/14 ,  H01L23/057 ,  H01L23/053

Abstract: Electronic modules having complex contact structures may be formed by encapsulating panels containing pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within the panel along the cut lines. Holes defining contact regions along the electronic module sidewall may be cut into the panel along the cut lines to expose the buried interconnects. The panel may be metallized, e.g. by a series or processes including plating, on selected surfaces including in the holes to form the contacts and other metal structures followed by cutting the panel along the cut lines to singulate the individual electronic models. The contacts may be located in a conductive grove providing a castellated module.

公开(公告)号：US11336167B1

公开(公告)日：2022-05-17

申请号：US16833156

申请日：2020-03-27

Applicant: Vicor Corporation

Inventor： Patrizio Vinciarelli ,  Rudolph F. Mutter

IPC: H02M1/08 ,  H05K1/02 ,  H05K1/14 ,  H01L23/00 ,  H02M1/00

Abstract: Encapsulated electronic modules having complex contact structures may be formed by encapsulating panels containing a substrate comprising pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within terminal holes and other holes drilled in the panel within the boundaries of the cut lines. Slots may be cut in the panel along the cut lines. The interior of the holes, as well as surfaces within the slots and on the surfaces of the panel may be metallized, e.g. by a series of processes including plating. Solder may be dispensed into the holes for surface mounting. Two or more panels may be stacked prior to singulation to form module stacks.
Delivering power vertically to semiconductor dies is described using multi-cell converters having a relatively large cell and output terminal pitch. Translation interconnections may be provided in a semiconductor package substrate, a system PCB, or in an interconnection module. The translation interconnections or interconnection module may provide vertical power delivery to semiconductor devices through a semiconductor power grid having a small pitch. The converters and interconnection modules may be fabricated in panels and stacked prior to singulation. Sintering techniques may be used to interconnect some or all of the functional layers of the stack.