公开(公告)号：US20240266437A1

公开(公告)日：2024-08-08

申请号：US18635018

申请日：2024-04-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Yu Chen ,  Bo-Lin Huang ,  Jhong-Yi Huang ,  Keng-Jen Lin ,  Yu-Shu Lin

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/16

CPC classification number: H01L29/7848 ,  H01L21/0245 ,  H01L29/16

Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming recesses adjacent to two sides of the gate structure, forming a buffer layer in the recesses, forming a first linear bulk layer on the buffer layer, forming a second linear bulk layer on the first linear bulk layer, forming a bulk layer on the second linear bulk layer, and forming a cap layer on the bulk layer.

公开(公告)号：US11990547B2

公开(公告)日：2024-05-21

申请号：US17033897

申请日：2020-09-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Yu Chen ,  Bo-Lin Huang ,  Jhong-Yi Huang ,  Keng-Jen Lin ,  Yu-Shu Lin

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/16

CPC classification number: H01L29/7848 ,  H01L21/0245 ,  H01L29/16

Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming recesses adjacent to two sides of the gate structure, forming a buffer layer in the recesses, forming a first linear bulk layer on the buffer layer, forming a second linear bulk layer on the first linear bulk layer, forming a bulk layer on the second linear bulk layer, and forming a cap layer on the bulk layer.

公开(公告)号：US11462441B2

公开(公告)日：2022-10-04

申请号：US17147477

申请日：2021-01-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Wei Su ,  Hao-Che Feng ,  Hsuan-Tai Hsu ,  Chun-Yu Chen ,  Wei-Hao Huang ,  Bin-Siang Tsai ,  Ting-An Chien

IPC: H01L21/8234 ,  H01L21/762 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786 ,  H01L29/775 ,  H01L29/06 ,  H01L21/3065

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a fin-shaped structure on a substrate, forming a dielectric layer surrounding the fin-shaped structure, performing an anneal process to transform the dielectric layer into a shallow trench isolation (STI), removing the fin-shaped structure to form a trench, and forming a stack structure in the trench. Preferably, the stack structure includes a first semiconductor layer on the fin-shaped structure and a second semiconductor layer on the first semiconductor layer and the first semiconductor layer and the second semiconductor layer include different materials.

公开(公告)号：US20190221655A1

公开(公告)日：2019-07-18

申请号：US15869087

申请日：2018-01-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yen-Hsing Chen ,  Chun-Yu Chen ,  Chung-Ting Huang ,  Zih-Hsuan Huang ,  Yu-Chien Sung

IPC: H01L29/66 ,  H01L21/3213 ,  H01L21/033 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L29/66636 ,  H01L21/033 ,  H01L21/32139 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/7848

Abstract: A method for fabricating a semiconductor device is disclosed. A fin is formed on a substrate. The fin protrudes from a trench isolation layer on a substrate. The fin comprises a source region, a drain region and a channel region therebetween. A dummy gate strides across the fin and surrounding the channel region. An upper portion of the fin is removed so as to form a hollow channel underneath the dummy gate. A replacement channel layer is in-situ epitaxially grown in the hollow channel.

公开(公告)号：US09337193B2

公开(公告)日：2016-05-10

申请号：US14637412

申请日：2015-03-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chin-I Liao ,  Chun-Yu Chen

IPC: H01L29/66 ,  H01L27/088 ,  H01L29/417 ,  H01L29/78 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/267

CPC classification number: H01L27/0886 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device includes at least two fin-shaped structures, a gate structure, at least two epitaxial structures and a cap. The fin-shaped structures are disposed on a substrate and are covered by the gate structure. The epitaxial structures spaced apart from each other are disposed at one side of the gate structure and respectively directly contact each fin-shaped structure. The cap simultaneously surrounds the epitaxial structures, and at least two adjacent caps are merged together.

Abstract translation: 半导体器件包括至少两个鳍状结构，栅极结构，至少两个外延结构和帽。 鳍状结构设置在基板上并被栅极结构覆盖。 彼此间隔开的外延结构设置在栅极结构的一侧，并且分别直接接触每个鳍状结构。 盖同时围绕外延结构，并且至少两个相邻的盖合并在一起。

公开(公告)号：US09112030B2

公开(公告)日：2015-08-18

申请号：US14070596

申请日：2013-11-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chin-I Liao ,  Chun-Yu Chen

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/16

CPC classification number: H01L29/785 ,  H01L29/16 ,  H01L29/66795

Abstract: An epitaxial structure for a non-planar transistor is provided. A substrate has a fin-shaped structure. A gate is disposed across the fin-shaped structure. A silicon germanium epitaxial structure is disposed on the fin-shaped structure beside the gate, wherein the silicon germanium epitaxial structure has 4 surfaces and its aspect ratio of width and thickness is at a range of 1:1˜1.3. A method for forming said epitaxial structure is also provided.

Abstract translation: 提供了一种用于非平面晶体管的外延结构。 衬底具有鳍状结构。 门跨越鳍状结构设置。 在栅极旁边的鳍状结构上设置硅锗外延结构，其中硅锗外延结构具有4 <1,1,1“表面，其宽度和厚度的纵横比在1：1〜 1.3。 还提供了一种用于形成所述外延结构的方法。

公开(公告)号：US20150179645A1

公开(公告)日：2015-06-25

申请号：US14637412

申请日：2015-03-04

Applicant: United Microelectronics Corp.

Inventor： Chin-I Liao ,  Chun-Yu Chen

IPC: H01L27/088 ,  H01L29/267 ,  H01L29/165 ,  H01L29/78 ,  H01L29/16 ,  H01L29/161

CPC classification number: H01L27/0886 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device includes at least two fin-shaped structures, a gate structure, at least two epitaxial structures and a cap. The fin-shaped structures are disposed on a substrate and are covered by the gate structure. The epitaxial structures spaced apart from each other are disposed at one side of the gate structure and respectively directly contact each fin-shaped structure. The cap simultaneously surrounds the epitaxial structures, and at least two adjacent caps are merged together.

Abstract translation: 半导体器件包括至少两个鳍状结构，栅极结构，至少两个外延结构和帽。 鳍状结构设置在基板上并被栅极结构覆盖。 彼此间隔开的外延结构设置在栅极结构的一侧，并且分别直接接触每个鳍状结构。 盖同时围绕外延结构，并且至少两个相邻的盖合并在一起。

公开(公告)号：US20150145067A1

公开(公告)日：2015-05-28

申请号：US14092942

申请日：2013-11-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chin-I Liao ,  Chun-Yu Chen

IPC: H01L29/78

CPC classification number: H01L29/7851 ,  H01L29/7848

Abstract: A fin structure includes a substrate and a fin disposed on a top surface of the substrate. The fin has a height. An epitaxial structure surrounds the fin and the epitaxial structure has a top point which is the farthest point on the epitaxial structure away from the top surface of the substrate. There is a distance between the top point and the top surface of the substrate. A rational number of the distance to the height is not less than 7.

Abstract translation: 翅片结构包括设置在基板的顶表面上的基板和翅片。 翅片有一个高度。 外延结构围绕鳍状物并且外延结构具有顶点，该顶点是离开衬底顶表面的外延结构上的最远点。 在基板的顶点和顶面之间存在距离。 到高度的距离的合理数量不小于7。

公开(公告)号：US09680022B1

公开(公告)日：2017-06-13

申请号：US15207916

申请日：2016-07-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Chen Chan ,  Yi-Fan Li ,  Yen-Hsing Chen ,  Chun-Yu Chen ,  Chung-Ting Huang ,  Zih-Hsuan Huang ,  Ming-Hua Chang ,  Yu-Shu Lin ,  Shu-Yen Chan

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L29/08 ,  H01L29/161

CPC classification number: H01L29/66795 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/1054 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.

公开(公告)号：US09397214B1

公开(公告)日：2016-07-19

申请号：US14622943

申请日：2015-02-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Chen Chan ,  Hsin-Chang Wu ,  Chun-Yu Chen ,  Ming-Hua Chang ,  Sheng-Hsu Liu ,  Chieh-Lung Wu ,  Chung-Min Tsai ,  Neng-Hui Yang

IPC: H01L27/092 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/36 ,  H01L29/161

CPC classification number: H01L29/7848 ,  H01L29/165 ,  H01L29/785

Abstract: A semiconductor device is provided includes a substrate, a gate structure formed on the substrate, an epitaxial source/drain structure respectively formed at two sides of the gate structure, and a boron-rich interface layer. The boron-rich interface layer includes a bottom-and-sidewall portion and a top portion, and the epitaxial source/drain structure is enclosed by the bottom-and-sidewall portion and the top portion.

Abstract translation: 提供了一种半导体器件，包括衬底，形成在衬底上的栅极结构，分别形成在栅极结构的两侧的外延源极/漏极结构和富含硼的界面层。 富硼界面层包括底侧和侧壁部分和顶部，并且外延源极/漏极结构被底部和侧壁部分以及顶部部分包围。