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公开(公告)号：US07989707B2
公开(公告)日：2011-08-02
申请号：US11815580
申请日：2006-12-12
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号： H05K1/16
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译： 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。
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公开(公告)号：US07772689B2
公开(公告)日：2010-08-10
申请号：US11470432
申请日：2006-09-06
CPC分类号： H01L23/49827 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2924/01049
摘要： It is configured to comprise a semiconductor chip 110, a resin member 106 for forming a cavity 109 in which this semiconductor chip 110 is installed, and wiring 105 constructed of pattern wiring 105b formed so as to be exposed to an upper surface 106b of this resin member 106 and also connected to the semiconductor chip 110 and a post part 105a in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to a lower surface 106a of the resin member 106.
摘要翻译： 其构造为包括半导体芯片110，用于形成其中安装该半导体芯片110的空腔109的树脂构件106和由图案布线105b构成的布线105，其形成为暴露于该树脂的上表面106b 构件106，并且还连接到半导体芯片110和其中一端连接到图案布线105b的后部105a，并且另一端形成为暴露于树脂构件106的下表面106a。
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公开(公告)号：US20070052071A1
公开(公告)日：2007-03-08
申请号：US11470432
申请日：2006-09-06
IPC分类号： H01L23/495
CPC分类号： H01L23/49827 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2924/01049
摘要： It is configured to comprise a semiconductor chip 110, a resin member 106 for forming a cavity 109 in which this semiconductor chip 110 is installed, and wiring 105 constructed of pattern wiring 105b formed so as to be exposed to a lower surface 106a of this resin member 106 and also connected to the semiconductor chip 110 and a post part 105a in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to a front surface 106b of the resin member 106.
摘要翻译： 其构造为包括半导体芯片110，用于形成其中安装该半导体芯片110的空腔109的树脂构件106和由图案布线105b构成的布线105，其形成为暴露于下表面106a 该树脂构件106还连接到半导体芯片110和其一端连接到图案布线105b的后部105a，并且另一端形成为暴露于前部表面106b 树脂构件106。
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公开(公告)号：US20070052083A1
公开(公告)日：2007-03-08
申请号：US11465284
申请日：2006-08-17
CPC分类号： H01L21/6835 , H01L21/4846 , H01L23/3107 , H01L24/48 , H01L24/73 , H01L24/83 , H01L25/105 , H01L2221/68345 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83191 , H01L2225/1035 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/01049
摘要： A semiconductor package 100 is constructed of a semiconductor chip 110, a sealing resin 106 for sealing this semiconductor chip 110, and wiring 105 formed inside the sealing resin 106. And, the wiring 105 is constructed of pattern wiring 105b connected to the semiconductor chip 110 and also formed so as to be exposed to a lower surface 106b of the sealing resin 106, and a post part 105a formed so as to extend in a thickness direction of the sealing resin 106, the post part in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to an upper surface 106a of the sealing resin 106.
摘要翻译： 半导体封装100由半导体芯片110，用于密封该半导体芯片110的密封树脂106和形成在密封树脂106内部的布线105构成。 并且，布线105由连接到半导体芯片110的图案布线105b构成，并且还形成为暴露于密封树脂106的下表面106b，以及形成为在 密封树脂106的厚度方向，其一端连接到图案布线105b的另一端形成为暴露于密封树脂106的上表面106a。
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公开(公告)号：US08793868B2
公开(公告)日：2014-08-05
申请号：US13167203
申请日：2011-06-23
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号： H05K3/30
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译： 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。
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公开(公告)号：US07847384B2
公开(公告)日：2010-12-07
申请号：US11465284
申请日：2006-08-17
IPC分类号： H01L23/02
CPC分类号： H01L21/6835 , H01L21/4846 , H01L23/3107 , H01L24/48 , H01L24/73 , H01L24/83 , H01L25/105 , H01L2221/68345 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83191 , H01L2225/1035 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/01049
摘要： A semiconductor package 100 is constructed of a semiconductor chip 110, a sealing resin 106 for sealing this semiconductor chip 110, and wiring 105 formed inside the sealing resin 106. And, the wiring 105 is constructed of pattern wiring 105b connected to the semiconductor chip 110 and also formed so as to be exposed to a lower surface 106b of the sealing resin 106, and a post part 105a formed so as to extend in a thickness direction of the sealing resin 106, the post part in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to an upper surface 106a of the sealing resin 106.
摘要翻译： 半导体封装100由半导体芯片110，用于密封该半导体芯片110的密封树脂106和形成在密封树脂106内部的布线105构成。布线105由连接到半导体芯片110的图案布线105b构成 并且还形成为暴露于密封树脂106的下表面106b，以及沿密封树脂106的厚度方向延伸形成的柱部105a，其一端连接到密封树脂106的后部 图案布线105b，另一端形成为暴露于密封树脂106的上表面106a。
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公开(公告)号：US20090008765A1
公开(公告)日：2009-01-08
申请号：US11815580
申请日：2006-12-12
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译： 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。
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公开(公告)号：US07955454B2
公开(公告)日：2011-06-07
申请号：US11516737
申请日：2006-09-07
CPC分类号： H05K3/4661 , H05K3/0035 , H05K3/108 , H05K3/381 , H05K2203/0554 , H05K2203/1152 , Y10T156/10 , Y10T156/1057 , Y10T156/1082
摘要： The method for forming wiring includes: laminating a thermosetting resin film and a metallic foil on an insulating substrate where base-layer wiring is formed, a mat surface of the metallic foil facing the resin film, pressing the film and the foil with application of heat; forming an opening in the metallic foil to expose a part of the insulating resin layer in which a via hole is to be formed; forming the via hole in the insulating resin layer by using as a mask the metallic foil; performing a desmear process of the via hole via the opening of the metallic foil; removing the metallic foil; forming an electroless-plated layer that covers the top surface of the insulating resin layer, a side surface of the via hole and a top surface of the base-layer wiring; and forming wiring including an electroplated layer on the electroless-plated layer.
摘要翻译： 形成布线的方法包括：在形成基底布线的绝缘基板上层叠热固性树脂膜和金属箔，金属箔的面向树脂膜的垫表面，施加热量来压制膜和箔 ; 在所述金属箔中形成开口以暴露要形成通孔的绝缘树脂层的一部分; 通过使用金属箔作为掩模在绝缘树脂层中形成通孔; 经由金属箔的开口进行通孔的去污处理; 去除金属箔; 形成覆盖绝缘树脂层的顶面，通孔的侧面和基底布线的顶面的无电镀层; 以及在所述化学镀层上形成包括电镀层的布线。
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公开(公告)号：US07884484B2
公开(公告)日：2011-02-08
申请号：US11372916
申请日：2006-03-10
CPC分类号： H01L23/5383 , H01L21/563 , H01L21/6835 , H01L23/18 , H01L23/3128 , H01L23/49805 , H01L23/49816 , H01L23/5389 , H01L24/81 , H01L25/0655 , H01L2221/68345 , H01L2224/1134 , H01L2224/13144 , H01L2224/136 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/92125 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/381 , H05K1/185 , H05K3/4644 , Y10T29/49126 , Y10T29/4913 , Y10T29/49135 , Y10T29/49155 , Y10T29/49156 , H01L2224/13099 , H01L2924/00 , H01L2224/0401
摘要： A wiring board includes an insulating layer in which a semiconductor chip is embedded, and a wiring structure connected to the semiconductor chip. A reinforcing member reinforcing the insulating layer is embedded in the insulating layer. This enables reduction in a thickness of the wiring board and a suppression of warpage of the wiring board.
摘要翻译： 布线基板包括嵌入有半导体芯片的绝缘层和与半导体芯片连接的布线结构。 加强绝缘层的加强构件嵌入在绝缘层中。 这样可以减少布线板的厚度和抑制布线板的翘曲。
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公开(公告)号：US20070051459A1
公开(公告)日：2007-03-08
申请号：US11516737
申请日：2006-09-07
CPC分类号： H05K3/4661 , H05K3/0035 , H05K3/108 , H05K3/381 , H05K2203/0554 , H05K2203/1152 , Y10T156/10 , Y10T156/1057 , Y10T156/1082
摘要： The method for forming wiring includes: laminating a thermosetting resin film in a semi-cured state and a metallic foil in this order on an insulating substrate where base-layer wiring is formed, a mat surface of the metallic foil facing the resin film, pressing the film and the foil with application of heat; forming an opening in the metallic foil so as to expose a part of the insulating resin layer in which a via hole is to be formed; forming the via hole in the insulating resin layer by irradiating high-energy beams on to insulating resin layer by using as a mask the metallic foil in which the opening is formed; performing a desmear process of the via hole via the opening of the metallic foil; removing the metallic foil by etching; forming an electroless-plated layer that continuously covers the top surface of the insulating resin layer, a side surface of the via hole and a top surface of the base-layer wiring corresponding to the bottom of the via hole; and forming wiring including an electroplated layer on the electroless-plated layer by a semi-additive process.
摘要翻译： 形成布线的方法包括：在形成基底布线的绝缘基板上依次层叠半固化状态的热固性树脂膜和金属箔，金属箔的面向树脂膜的垫表面，压制 薄膜和箔片应用热量; 在金属箔中形成开口以露出要形成通孔的绝缘树脂层的一部分; 通过使用形成开口的金属箔作为掩模，将高能束照射到绝缘树脂层上，从而在绝缘树脂层中形成通孔; 经由金属箔的开口进行通孔的去污处理; 通过蚀刻去除金属箔; 形成连续地覆盖绝缘树脂层的顶面，通路孔的侧面和与通孔的底部对应的基底布线的顶面的无电解镀层; 以及通过半添加工艺在所述化学镀层上形成包括电镀层的布线。
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