-
公开(公告)号：US09287128B2
公开(公告)日：2016-03-15
申请号：US14635926
申请日：2015-03-02
IPC分类号： H01L21/302 , H01L21/306 , H01L21/02 , H01L21/3105 , H01L21/28
CPC分类号： H01L21/30625 , H01L21/02057 , H01L21/02063 , H01L21/02065 , H01L21/02381 , H01L21/0243 , H01L21/02433 , H01L21/02488 , H01L21/02494 , H01L21/02532 , H01L21/02538 , H01L21/0262 , H01L21/02639 , H01L21/28255 , H01L21/28264 , H01L21/30604 , H01L21/31053 , H01L21/31055
摘要： A device includes a crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by using a planarization process configured with a selectivity of the crystalline material to the insulator greater than one. In a preferred embodiment, the planarization process uses a composition including abrasive spherical silica, H2O2 and water. In a preferred embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique.
-
2.发明授权公开(公告)号：US09105549B2
公开(公告)日：2015-08-11
申请号：US14333204
申请日：2014-07-16
IPC分类号： H01L27/146 , H01L27/144 , H01L31/0304 , H01L31/0312 , H01L31/103 , H01L31/105 , H01L21/02 , H01L21/762
CPC分类号： H01L27/14689 , H01L21/02381 , H01L21/02521 , H01L21/02532 , H01L21/02639 , H01L21/02647 , H01L21/76224 , H01L27/1446 , H01L27/14612 , H01L27/14643 , H01L31/0304 , H01L31/03046 , H01L31/0312 , H01L31/103 , H01L31/1037 , H01L31/105 , Y02E10/544 , Y02P70/521
摘要： Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
摘要翻译： 非硅基半导体器件通过使用纵横比捕获材料集成到硅制造工艺中。 在结晶材料的至少一部分中的非硅光感测装置可以输出由其中的光吸收产生的电子。 示例性的光感测装置可以具有相对较大的微米尺寸。 作为示例性应用，通过结合纵横比捕获技术在硅衬底上形成互补金属氧化物半导体光电探测器。
-
公开(公告)号：US08796734B2
公开(公告)日：2014-08-05
申请号：US14104924
申请日：2013-12-12
发明人： Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
IPC分类号： H01L21/02
CPC分类号： H01L21/02609 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/02538 , H01L21/02612 , H01L21/02639 , H01L21/02647 , H01L21/28255 , H01L21/28264 , H01L21/8258 , H01L27/0605 , H01L27/092 , H01L29/04 , H01L29/1054 , H01L29/16 , H01L29/20 , H01L29/66666 , H01L29/66795 , H01L29/778 , H01L29/78 , H01L29/7827 , H01L29/7835 , H01L29/7848 , H01L29/785 , H01L29/78687 , H01L31/028 , H01L31/0304 , H01L31/036 , H01L31/1808 , H01L33/20 , H01L33/30 , H01L33/34 , Y02E10/50
摘要： Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
-
公开(公告)号：US20140147981A1
公开(公告)日：2014-05-29
申请号：US14103521
申请日：2013-12-11
CPC分类号： H01L29/66636 , H01L21/02667 , H01L21/26506 , H01L21/324 , H01L29/1054 , H01L29/165 , H01L29/6653 , H01L29/7842 , H01L29/7843 , H01L29/7845 , H01L29/7848 , H01L29/78687
摘要： Strain is induced in a semiconductor layer. Embodiments include inducing strain by, for example, creation of free surfaces.
摘要翻译： 在半导体层中诱发应变。 实施例包括通过例如产生自由表面诱导应变。
-
公开(公告)号：US08519436B2
公开(公告)日：2013-08-27
申请号：US13681214
申请日：2012-11-19
发明人： Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
IPC分类号： H01L21/02
CPC分类号： H01L21/02609 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/02538 , H01L21/02612 , H01L21/02639 , H01L21/02647 , H01L21/28255 , H01L21/28264 , H01L21/8258 , H01L27/0605 , H01L27/092 , H01L29/04 , H01L29/1054 , H01L29/16 , H01L29/20 , H01L29/66666 , H01L29/66795 , H01L29/778 , H01L29/78 , H01L29/7827 , H01L29/7835 , H01L29/7848 , H01L29/785 , H01L29/78687 , H01L31/028 , H01L31/0304 , H01L31/036 , H01L31/1808 , H01L33/20 , H01L33/30 , H01L33/34 , Y02E10/50
摘要： Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
-
公开(公告)号：US20180019320A1
公开(公告)日：2018-01-18
申请号：US15694375
申请日：2017-09-01
发明人： Peide Ye , Zhiyuan Cheng , Yi Xuan , Yanqing Wu , Bunmi Adekore , James Fiorenza
IPC分类号： H01L29/66 , H01L29/51 , H01L21/28 , H01L29/778 , H01L21/02
摘要： Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device are disclosed. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP.
-
公开(公告)号：US20160293434A1
公开(公告)日：2016-10-06
申请号：US15069728
申请日：2016-03-14
IPC分类号： H01L21/306 , H01L21/3105 , H01L21/02
CPC分类号： H01L21/30625 , H01L21/02057 , H01L21/02063 , H01L21/02065 , H01L21/02381 , H01L21/0243 , H01L21/02433 , H01L21/02488 , H01L21/02494 , H01L21/02532 , H01L21/02538 , H01L21/0262 , H01L21/02639 , H01L21/28255 , H01L21/28264 , H01L21/30604 , H01L21/31053 , H01L21/31055
摘要： A device includes a crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by using a planarization process configured with a selectivity of the crystalline material to the insulator greater than one. In a preferred embodiment, the planarization process uses a composition including abrasive spherical silica, H2O2 and water. In a preferred embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique.
-
8.发明授权Methods for semiconductor sensor structures with reduced dislocation defect densities 有权具有减少位错缺陷密度的半导体传感器结构的方法公开(公告)号：US09455299B2
公开(公告)日：2016-09-27
申请号：US14755665
申请日：2015-06-30
IPC分类号： H01L21/00 , H01L27/146 , H01L27/144 , H01L31/0304 , H01L31/0312 , H01L31/103 , H01L31/105 , H01L21/02 , H01L21/762
CPC分类号： H01L27/14689 , H01L21/02381 , H01L21/02521 , H01L21/02532 , H01L21/02639 , H01L21/02647 , H01L21/76224 , H01L27/1446 , H01L27/14612 , H01L27/14643 , H01L31/0304 , H01L31/03046 , H01L31/0312 , H01L31/103 , H01L31/1037 , H01L31/105 , Y02E10/544 , Y02P70/521
摘要： Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
摘要翻译： 非硅基半导体器件通过使用纵横比捕获材料集成到硅制造工艺中。 在结晶材料的至少一部分中的非硅光感测装置可以输出由其中的光吸收产生的电子。 示例性的光感测装置可以具有相对较大的微米尺寸。 作为示例性应用，通过结合纵横比捕获技术在硅衬底上形成互补金属氧化物半导体光电探测器。
-
9.发明申请LATTICE-MISMATCHED SEMICONDUCTOR STRUCTURES WITH REDUCED DISLOCATION DEFECT DENSITIES AND RELATED METHODS FOR DEVICE FABRICATION 审中-公开具有减少偏差缺陷密度的薄膜半导体结构和相关方法用于器件制造公开(公告)号：US20160111285A1
公开(公告)日：2016-04-21
申请号：US14977135
申请日：2015-12-21
发明人： Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
CPC分类号： H01L21/02609 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/02538 , H01L21/02612 , H01L21/02639 , H01L21/02647 , H01L21/28255 , H01L21/28264 , H01L21/8258 , H01L27/0605 , H01L27/092 , H01L29/04 , H01L29/1054 , H01L29/16 , H01L29/20 , H01L29/66666 , H01L29/66795 , H01L29/778 , H01L29/78 , H01L29/7827 , H01L29/7835 , H01L29/7848 , H01L29/785 , H01L29/78687 , H01L31/028 , H01L31/0304 , H01L31/036 , H01L31/1808 , H01L33/20 , H01L33/30 , H01L33/34 , Y02E10/50
摘要： Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
摘要翻译： 具有有限区域的单片晶格失配的半导体异质结构的制造，其具有基本上耗尽穿透位错的上部，以及基于这种晶格失配的异质结构的半导体器件的制造。
-
公开(公告)号：US09219112B2
公开(公告)日：2015-12-22
申请号：US14635793
申请日：2015-03-02
发明人： Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
IPC分类号： H01L29/04 , H01L21/02 , H01L21/28 , H01L21/8258 , H01L27/06 , H01L27/092 , H01L29/10 , H01L29/66 , H01L29/78 , H01L31/18 , H01L29/16 , H01L29/20 , H01L29/778 , H01L31/028 , H01L31/0304 , H01L31/036 , H01L33/20 , H01L33/30 , H01L33/34 , H01L29/786
CPC分类号： H01L21/02609 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/02538 , H01L21/02612 , H01L21/02639 , H01L21/02647 , H01L21/28255 , H01L21/28264 , H01L21/8258 , H01L27/0605 , H01L27/092 , H01L29/04 , H01L29/1054 , H01L29/16 , H01L29/20 , H01L29/66666 , H01L29/66795 , H01L29/778 , H01L29/78 , H01L29/7827 , H01L29/7835 , H01L29/7848 , H01L29/785 , H01L29/78687 , H01L31/028 , H01L31/0304 , H01L31/036 , H01L31/1808 , H01L33/20 , H01L33/30 , H01L33/34 , Y02E10/50
摘要： Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
-
-
-
-
-
-
-
-
-
搜索结果
27 条记录 (耗时 0.031 秒)
