发明申请
US20160111285A1 LATTICE-MISMATCHED SEMICONDUCTOR STRUCTURES WITH REDUCED DISLOCATION DEFECT DENSITIES AND RELATED METHODS FOR DEVICE FABRICATION
审中-公开
具有减少偏差缺陷密度的薄膜半导体结构和相关方法用于器件制造
- 专利标题： LATTICE-MISMATCHED SEMICONDUCTOR STRUCTURES WITH REDUCED DISLOCATION DEFECT DENSITIES AND RELATED METHODS FOR DEVICE FABRICATION
- 专利标题（中）： 具有减少偏差缺陷密度的薄膜半导体结构和相关方法用于器件制造
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申请号： US14977135申请日： 2015-12-21
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公开(公告)号： US20160111285A1公开(公告)日： 2016-04-21
- 发明人: Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 主分类号： H01L21/02
- IPC分类号： H01L21/02 ; H01L29/66
摘要：
Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
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