公开(公告)号：US20240297083A1

公开(公告)日：2024-09-05

申请号：US18662374

申请日：2024-05-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Cheng Chen ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/161

CPC分类号： H01L21/823814 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/161

摘要： A semiconductor device includes a first epitaxial feature disposed in a first device region of the semiconductor device, a second epitaxial feature disposed in a second device region of the semiconductor device, a first silicide layer disposed on the first epitaxial feature, a second silicide layer disposed on the second epitaxial feature, a metal layer disposed on the first silicide layer, a first contact plug landing on the metal layer, and a second contact plug landing on the second silicide layer. The metal layer and the second silicide layer each include a first metal element. The first silicide layer includes a second metal element different from the first metal element.

公开(公告)号：US12062721B2

公开(公告)日：2024-08-13

申请号：US17666240

申请日：2022-02-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Cheng Chen ,  Kuo-Cheng Chiang ,  Zhi-Chang Lin

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/78612 ,  H01L21/02236 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L27/0921 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696

摘要： A semiconductor device according to the present disclosure includes an active region including a channel region and a source/drain region adjacent the channel region, a vertical stack of channel members over the channel region, a gate structure over and around the vertical stack of channel members, a bottom dielectric feature over the source/drain region, a source/drain feature over the bottom dielectric feature, and a germanium layer disposed between the bottom dielectric feature and the source/drain region.

公开(公告)号：US11916122B2

公开(公告)日：2024-02-27

申请号：US17370833

申请日：2021-07-08

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Zhi-Chang Lin ,  Kuan-Ting Pan ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Lo-Heng Chang ,  Chien-Ning Yao ,  Kuo-Cheng Chiang

IPC分类号： H01L29/423 ,  H01L29/06 ,  H01L29/786 ,  H01L29/66 ,  H01L29/40

CPC分类号： H01L29/42392 ,  H01L29/0665 ,  H01L29/401 ,  H01L29/6653 ,  H01L29/78696

摘要： A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.

公开(公告)号：US11901424B2

公开(公告)日：2024-02-13

申请号：US17853709

申请日：2022-06-29

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Shih-Cheng Chen ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L29/417 ,  H01L21/762 ,  H01L21/764 ,  H01L21/768 ,  H01L29/40 ,  H01L21/8238 ,  H01L23/522

CPC分类号： H01L29/41791 ,  H01L21/764 ,  H01L21/7682 ,  H01L21/76232 ,  H01L21/76843 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L23/5226 ,  H01L29/401

摘要： A device includes an active region, a gate structure, a source/drain epitaxial structure, an epitaxial layer, a metal alloy layer, a contact, and a contact etch stop layer. The gate structure is across the active region. The source/drain epitaxial structure is over the active region and adjacent the gate structure. The epitaxial layer is over the source/drain epitaxial structure. The metal alloy layer is over the epitaxial layer. The contact is over the metal alloy layer. The contact etch stop layer lines sidewalls of the source/drain epitaxial structure. The metal alloy layer is spaced apart from the contact etch stop layer.

公开(公告)号：US20230420520A1

公开(公告)日：2023-12-28

申请号：US18150524

申请日：2023-01-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tsung-Han Chuang ,  Zhi-Chang Lin ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Chien Ning Yao ,  Kai-Lin Chuang ,  Kuo-Cheng Chiang ,  Chih-Hao Wang

IPC分类号： H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L21/02 ,  H01L29/66

CPC分类号： H01L29/0847 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L21/02532 ,  H01L21/02639 ,  H01L29/775

摘要： In an embodiment, a device includes: first nanostructures; a first undoped semiconductor layer contacting a first dummy region of the first nanostructures; a first spacer on the first undoped semiconductor layer; a first source/drain region on the first spacer, the first source/drain region contacting a first channel region of the first nanostructures; and a first gate structure wrapped around the first channel region and the first dummy region of the first nanostructures.

公开(公告)号：US11695076B2

公开(公告)日：2023-07-04

申请号：US17193732

申请日：2021-03-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Pei-Hsun Wang ,  Chih-Chao Chou ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Jui-Chien Huang ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L21/02 ,  H01L21/285

CPC分类号： H01L29/78618 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/28518 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/78684 ,  H01L29/78696

摘要： The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.

公开(公告)号：US20230178600A1

公开(公告)日：2023-06-08

申请号：US17663463

申请日：2022-05-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tsung-Han Chuang ,  Zhi-Chang Lin ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Chien Ning Yao ,  Kai-Lin Chuang ,  Kuo-Cheng Chiang ,  Chih-Hao Wang

IPC分类号： H01L29/06 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8234

CPC分类号： H01L29/0665 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823431 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696

摘要： A method for forming a semiconductor device structure is provided. The semiconductor device structure includes a plurality of first nanostructures stacked over a substrate in a vertical direction. The semiconductor device structure includes a first bottom layer formed adjacent to the first nanostructures, and a first insulating layer formed over the first bottom layer. The semiconductor device structure includes a first source/drain (S/D) structure formed over the first insulating layer, and the first insulating layer is in direct contact with one of the first nanostructures.

公开(公告)号：US20230145872A1

公开(公告)日：2023-05-11

申请号：US18066141

申请日：2022-12-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Pei-Hsun Wang ,  Chih-Chao Chou ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Jui-Chien Huang ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L21/02 ,  H01L21/285

CPC分类号： H01L29/78618 ,  H01L29/0673 ,  H01L29/0653 ,  H01L29/42392 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/78696 ,  H01L21/02603 ,  H01L21/02532 ,  H01L21/28518 ,  H01L29/66545 ,  H01L29/78684

摘要： The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.

公开(公告)号：US11605737B2

公开(公告)日：2023-03-14

申请号：US17723283

申请日：2022-04-18

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Zhi-Chang Lin ,  Shih-Cheng Chen ,  Jung-Hung Chang ,  Lo-Heng Chang ,  Chien-Ning Yao

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02

摘要： A device includes a substrate, a semiconductor layer, a gate structure, source/drain regions, a bottom isolation layer, and a bottom spacer. The semiconductor layer is above the substrate. The gate structure is above the substrate and surrounds the semiconductor layer. The source/drain regions are on opposite sides of the semiconductor layer. The bottom isolation layer is between the substrate and the semiconductor layer. The bottom spacer is on a sidewall of the bottom isolation layer. The bottom isolation layer has a seam therein, and the seam exposes a sidewall of the bottom spacer.

公开(公告)号：US11515216B2

公开(公告)日：2022-11-29

申请号：US17166704

申请日：2021-02-03

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Cheng Chen ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC分类号： H01L21/8238 ,  H01L29/161 ,  H01L27/092

摘要： A semiconductor structure is received that has a first and second fins. A first epitaxial feature is formed on the first fin and has a first type dopant. A first capping layer is formed over the first epitaxial feature. A second epitaxial feature is formed on the second fin and has a second type dopant different from the first type dopant. A first metal is deposited on the second epitaxial feature and on the first capping layer. A first silicide layer is formed from the first metal and the second epitaxial feature, and a second capping layer is formed from the first metal and the first capping layer. The second capping layer is selectively removed. A second metal is deposited on the first epitaxial feature and over the second epitaxial feature. A second silicide layer is formed from the second metal and the first epitaxial feature.