公开(公告)号：US20240363725A1

公开(公告)日：2024-10-31

申请号：US18309125

申请日：2023-04-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Ling Hsieh ,  Hung-Ju Chou ,  Yu-Shan Lu ,  Wei-Yang Lee ,  Chih-Chung Chang ,  Yao-Hsuan Lai

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775

CPC分类号： H01L29/66439 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/775

摘要： Semiconductor devices and methods are provided. An exemplary method according to the present disclosure includes forming a semiconductor fin over a substrate, forming an integral dielectric layer over the substrate, wherein the dielectric layer includes a first portion extending along a sidewall surface of the semiconductor fin and a second portion disposed over the semiconductor fin, a thickness of the second portion of the dielectric layer is greater than a thickness of the first portion of the dielectric layer, forming a dummy gate electrode layer over the substrate, patterning the dielectric layer and the dummy gate electrode layer to form a dummy gate structure over a channel region of the semiconductor fin, forming source/drain features coupled to the channel region of the semiconductor fin and adjacent to the dummy gate structure, and replacing the dummy gate structure with a gate stack.

公开(公告)号：US12027626B2

公开(公告)日：2024-07-02

申请号：US18066188

申请日：2022-12-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Feng-Ching Chu ,  Wei-Yang Lee ,  Chia-Pin Lin

IPC分类号： H01L29/78 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/762 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/7856 ,  H01L21/3065 ,  H01L21/32134 ,  H01L21/76224 ,  H01L29/0673 ,  H01L29/1037 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66818 ,  H01L29/775 ,  H01L29/78618 ,  H01L29/78696

摘要： Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method of manufacture comprises receiving a substrate including a semiconductor material stack formed thereon, wherein the semiconductor material stack includes a first semiconductor layer of a first semiconductor material and second semiconductor layer of a second semiconductor material that is different than the first semiconductor material. Patterning the semiconductor material stack to form a trench. The patterning includes performing a first etch process with a first etchant for a first duration and then performing a second etch process with a second etchant for a second duration, where the second etchant is different from the first etchant and the second duration is greater than the first duration. The first etch process and the second etch process are repeated a number of times. Then epitaxially growing a third semiconductor layer of the first semiconductor material on a sidewall of the trench.

公开(公告)号：US20240186373A1

公开(公告)日：2024-06-06

申请号：US18434914

申请日：2024-02-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Yu Lin ,  Wei-Yang Lee ,  Chia-Pin Lin ,  Tzu-Hua Chiu ,  Kuan-Hao Cheng ,  Wei-Han Fan ,  Li-Li Su ,  Wei-Min Liu

IPC分类号： H01L29/06 ,  H01L21/02 ,  H01L21/306 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/0653 ,  H01L29/66553 ,  H01L29/66742 ,  H01L29/78696 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/30604 ,  H01L29/0665 ,  H01L29/42392

摘要： A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.

公开(公告)号：US12002845B2

公开(公告)日：2024-06-04

申请号：US17575145

申请日：2022-01-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Ting-Yeh Chen ,  Wei-Yang Lee ,  Chia-Pin Lin ,  Yuan-Ching Peng

IPC分类号： H01L29/76 ,  H01L23/64 ,  H01L27/08 ,  H01L29/00 ,  H01L29/06 ,  H01L49/02

CPC分类号： H01L28/20 ,  H01L23/647 ,  H01L27/0802 ,  H01L29/0649

摘要： In a method of manufacturing a semiconductor device, a fin structure, which includes a stacked layer of first semiconductor layers and second semiconductor layers disposed over a bottom fin structure and a hard mask layer over the stacked layer, is formed. An isolation insulating layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer is formed. A second dielectric layer is formed over the first dielectric layer. The second dielectric layer is recessed. A third dielectric layer is formed on the recessed second dielectric layer. The third dielectric layer is partially removed to form a trench. A fourth dielectric layer is formed by filling the trench with a dielectric material, thereby forming a wall fin structure.

公开(公告)号：US11798996B2

公开(公告)日：2023-10-24

申请号：US17813822

申请日：2022-07-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Ming Lee ,  Wei-Yang Lee

IPC分类号： H01L29/40 ,  H01L21/283 ,  H01L29/417 ,  H01L29/66 ,  H01L29/786 ,  H01L21/3213

CPC分类号： H01L29/401 ,  H01L21/283 ,  H01L21/32135 ,  H01L29/4175 ,  H01L29/66795 ,  H01L29/78696

摘要： A method includes performing a first etching process on a backside of a substrate to expose a dummy contact structure, performing a first deposition process to deposit a first dielectric layer around the dummy contract structure, performing a second deposition process to deposit an oxide layer on the first dielectric layer, removing the dummy contract structure to form a trench, depositing a sacrificial layer on sidewalls of the trench, depositing a second dielectric layer on the sacrificial layer, filling the trench with a conductive material, and removing the sacrificial layer to form an air spacer between the first dielectric layer and the second dielectric layer.

公开(公告)号：US11688793B2

公开(公告)日：2023-06-27

申请号：US17225786

申请日：2021-04-08

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Wei-Hao Lu ,  Chien-I Kuo ,  LI-Li Su ,  Wei-Yang Lee ,  Yee-Chia Yeo

IPC分类号： H01L29/161 ,  H01L27/092 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786 ,  H01L21/8234 ,  H01L29/417 ,  H01L29/40

CPC分类号： H01L29/66636 ,  H01L21/823418 ,  H01L21/823475 ,  H01L29/401 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/78696

摘要： A method for manufacturing an integrated circuit (IC) structure is provided. The method includes: etching a first recess and a second recess in a substrate; forming a sacrificial epitaxial plug in the first recess in the substrate; forming a first epitaxial feature and a second epitaxial feature respectively in the first recess and the second recess, wherein the first epitaxial feature is over the sacrificial epitaxial plug; forming a first source/drain epitaxial structure and a second source/drain epitaxial structure over the first epitaxial feature and the second epitaxial feature respectively; forming a gate structure laterally between the first source/drain epitaxial structure and the second source/drain epitaxial structure; removing the sacrificial epitaxial plug and the first epitaxial feature to form a backside via opening exposing a backside of the first source/drain epitaxial structure; and forming a backside via in the backside via opening.

公开(公告)号：US20220344472A1

公开(公告)日：2022-10-27

申请号：US17859909

申请日：2022-07-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ruei-Ping Lin ,  Kai-Di Tzeng ,  Chen-Ming Lee ,  Wei-Yang Lee

IPC分类号： H01L29/10 ,  H01L29/78 ,  H01L29/66 ,  H01L29/775 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06

摘要： A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a first plurality of channel members over a backside dielectric layer, a second plurality of channel members over the backside dielectric layer, a first gate structure over and wrapping around each of the first plurality of channel members, a second gate structure over and wrapping around each of the second plurality of channel members, and a through-substrate contact that extends between the first plurality of channel members and the second plurality of channel members, between the first gate structure and the second gate structure, and through the backside dielectric layer.

公开(公告)号：US20220285510A1

公开(公告)日：2022-09-08

申请号：US17375264

申请日：2021-07-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ting-Yeh Chen ,  Yen-Ting Chen ,  Wei-Yang Lee ,  Chia-Pin Lin

IPC分类号： H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/66

摘要： In an exemplary aspect, the present disclosure is directed to a device. The device includes a fin-shaped structure extending lengthwise along a first direction. The fin-shaped structure includes a stack of semiconductor layers arranged one over another along a second direction perpendicular to the first direction. The device also includes a first source/drain feature of a first dopant type on the fin-shaped structure and spaced away from the stack of semiconductor layers. The device further includes a second source/drain feature of a second dopant type on the fin-shaped structure over the first source/drain feature along the second direction and connected to the stack of semiconductor layers. The second dopant type is different from the first dopant type. Furthermore, the device additionally includes an isolation feature interposing between the first source/drain feature and the second source/drain features.

公开(公告)号：US20220262683A1

公开(公告)日：2022-08-18

申请号：US17739925

申请日：2022-05-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Feng-Ching Chu ,  Wei-Yang Lee ,  Chia-Pin Lin

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02

摘要： An integrated circuit (IC) includes a substrate and a first transistor on the substrate. The first transistor includes two first source/drain features, a stack of first semiconductor layers and second semiconductor layers alternately stacked one over another and disposed between the two first source/drain features, a first gate dielectric layer disposed over top and sidewalls of the stack of the first and the second semiconductor layers, a first gate electrode layer disposed over the first gate dielectric layer, and first spacer features disposed laterally between each of the second semiconductor layers and each of the two first source/drain features and electrically isolating each of the second semiconductor layers from each of the two first source/drain features. The first semiconductor layers electrically connect the two first source/drain features.

公开(公告)号：US20220223591A1

公开(公告)日：2022-07-14

申请号：US17657833

申请日：2022-04-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yen-Ting Chen ,  Bo-Yu Lai ,  Chien-Wei Lee ,  Hsueh-Chang Sung ,  Wei-Yang Lee ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L27/088 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/161 ,  H01L21/02 ,  H01L21/8234 ,  H01L21/3065

摘要： A method includes forming a semiconductor fin protruding higher than top surfaces of isolation regions. A top portion of the semiconductor fin is formed of a first semiconductor material. A semiconductor cap layer is formed on a top surface and sidewalls of the semiconductor fin. The semiconductor cap layer is formed of a second semiconductor material different from the first semiconductor material. The method further includes forming a gate stack on the semiconductor cap layer, forming a gate spacer on a sidewall of the gate stack, etching a portion of the semiconductor fin on a side of the gate stack to form a first recess extending into the semiconductor fin, recessing the semiconductor cap layer to form a second recess directly underlying a portion of the gate spacer, and performing an epitaxy to grow an epitaxy region extending into both the first recess and the second recess.