公开(公告)号：US20120299003A1

公开(公告)日：2012-11-29

申请号：US13568186

申请日：2012-08-07

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Atsushi HIROSE ,  Masashi TSUBUKU ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Atsushi HIROSE ,  Masashi TSUBUKU ,  Kosei NODA

IPC分类号： H01L29/22 ,  H01L27/15 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L21/823412 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/156 ,  H01L27/3213 ,  H01L29/24 ,  H01L29/36 ,  H01L29/7869 ,  H01L29/78693 ,  H01L33/025 ,  H01L2924/0002 ,  H04M1/0266 ,  H04R1/02 ,  H01L2924/00

摘要： An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.

摘要翻译： 目的是获得使用其中使用氧化物半导体层的薄膜晶体管，在检测信号和宽动态范围中具有高灵敏度的半导体器件。 使用具有作为沟道形成层的功能的氧化物半导体的薄膜晶体管形成模拟电路，其氢浓度为5×1019个原子/ cm3以下，并且在该状态下基本上起绝缘体的作用 其中不产生电场。 因此，可以获得在检测信号中具有高灵敏度和宽动态范围的半导体器件。

公开(公告)号：US20110090183A1

公开(公告)日：2011-04-21

申请号：US12901023

申请日：2010-10-08

申请人： Shunpei YAMAZAKI ,  Ryo ARASAWA ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Ryo ARASAWA ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3614 ,  G02F1/133553 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2201/123 ,  G02F2202/10 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/08 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  H01L21/02164 ,  H01L21/02266 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/467 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

摘要： In a liquid crystal display device including a plurality of pixels in a display portion and configured to performed display in a plurality of frame periods, each of the frame periods includes a writing period and a holding period, and after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period. The pixel includes a semiconductor layer including an oxide semiconductor layer, and the oxide semiconductor layer has a carrier concentration of less than 1×1014/cm3.

摘要翻译： 在包括显示部分中的多个像素并且被配置为在多个帧周期中进行显示的液晶显示装置中，每个帧周期包括写入周期和保持周期，并且在将图像信号输入到每个 在所述写入周期中的所述多个像素中，包括在所述多个像素中的每一个中的晶体管被​​截止，并且所述图像信号在所述保持周期中保持至少30秒。 像素包括具有氧化物半导体层的半导体层，氧化物半导体层的载流子浓度小于1×10 14 / cm 3。

公开(公告)号：US20110090184A1

公开(公告)日：2011-04-21

申请号：US12902670

申请日：2010-10-12

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC分类号： G06F3/038 ,  H03K19/0175

CPC分类号： H01L27/1255 ,  G09G3/20 ,  G09G3/2092 ,  G09G3/3233 ,  G09G3/3291 ,  G09G3/36 ,  G09G3/3648 ,  G09G2300/0439 ,  G09G2300/08 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/184 ,  G11C19/28 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H03K17/161 ,  H03K19/00315 ,  H03K19/096

摘要： To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.

摘要翻译： 为了减小晶体管的漏电流，可以抑制逻辑电路的故障。 逻辑电路包括晶体管，其包括具有沟道形成层的功能的氧化物半导体层，并且其中截止电流在沟道宽度中为每微米1×10-13A或更小。 作为时钟信号的第一信号，第二信号和第三信号被输入作为输入信号。 作为输出信号输出第四信号和第五信号，其电压状态根据输入的第一至第三信号而被设定。

公开(公告)号：US20110089975A1

公开(公告)日：2011-04-21

申请号：US12901057

申请日：2010-10-08

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC分类号： H03K19/08 ,  H01L29/12

CPC分类号： H01L29/7869 ,  H01L22/34 ,  H01L27/0207 ,  H01L27/1225 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.

摘要翻译： 逻辑电路包括具有使用氧化物半导体形成的沟道形成区域的薄膜晶体管，以及通过关闭薄膜晶体管而使端子中的一个成为浮置状态的电容器。 氧化物半导体的氢浓度为5×1019（原子/ cm3）以下，因此在不产生电场的状态下基本上用作绝缘体。 因此，可以减小薄膜晶体管的截止电流，从而通过薄膜晶体管抑制存储在电容器中的电荷的泄漏。 因此，可以防止逻辑电路的故障。 此外，可以通过减小薄膜晶体管的截止电流来降低在逻辑电路中流动的过量的电流，导致逻辑电路的低功耗。

公开(公告)号：US20110204368A1

公开(公告)日：2011-08-25

申请号：US13026511

申请日：2011-02-14

申请人： Masashi TSUBUKU ,  Kosei NODA

发明人： Masashi TSUBUKU ,  Kosei NODA

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/156

摘要： The band tail state and defects in the band gap are reduced as much as possible, whereby optical absorption of energy which is in the vicinity of the band gap or less than or equal to the band gap is reduced. In that case, not by merely optimizing conditions of manufacturing an oxide semiconductor film, but by making an oxide semiconductor to be a substantially intrinsic semiconductor or extremely close to an intrinsic semiconductor, defects on which irradiation light acts are reduced and the effect of light irradiation is reduced essentially. That is, even in the case where light with a wavelength of 350 nm is delivered at 1×1013 photons/cm2·sec, a channel region of a transistor is formed using an oxide semiconductor, in which the absolute value of the amount of the variation in the threshold voltage is less than or equal to 0.65 V.

摘要翻译： 频带尾部状态和带隙中的缺陷尽可能地减小，由此减小了在带隙附近或小于或等于带隙的能量的光吸收。 在这种情况下，不是仅通过优化氧化物半导体膜的制造条件，而是通过使氧化物半导体成为本质上的本征半导体，或者非常接近本征半导体，减少照射光的作用的缺陷和光照射 基本上减少了。 也就是说，即使在以1×1013个光子/ cm 2·sec传递波长为350nm的光的情况下，也可以使用氧化物半导体形成晶体管的沟道区域，其中， 阈值电压的变化小于或等于0.65 V.

公开(公告)号：US20110024750A1

公开(公告)日：2011-02-03

申请号：US12846534

申请日：2010-07-29

申请人： Shunpei YAMAZAKI ,  Hiroki OHARA ,  Toshinari SASAKI ,  Kosei NODA ,  Hideaki KUWABARA

发明人： Shunpei YAMAZAKI ,  Hiroki OHARA ,  Toshinari SASAKI ,  Kosei NODA ,  Hideaki KUWABARA

IPC分类号： H01L29/786 ,  H01L21/34 ,  H01L29/772 ,  H01L21/84

CPC分类号： H01L27/1225 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/136227 ,  G02F1/136277 ,  G02F1/1368 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/24 ,  H01L29/517 ,  H01L29/78609 ,  H01L29/7869

摘要： An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.

摘要翻译： 目的在于提供一种半导体器件，其具有可以充分降低布线之间的寄生电容的结构。 用作沟道保护层的氧化物绝缘层形成在与栅电极层重叠的氧化物半导体层的一部分上。 在与氧化物绝缘层的形成相同的步骤中，形成覆盖氧化物半导体层的周边部分的氧化物绝缘层。 设置覆盖氧化物半导体层的周边部分的氧化物绝缘层以增加栅极电极层与形成在栅电极层的上方或周围的布线层之间的距离，从而降低寄生电容。

公开(公告)号：US20110284839A1

公开(公告)日：2011-11-24

申请号：US13107283

申请日：2011-05-13

申请人： Shunpei YAMAZAKI ,  Toshinari SASAKI ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Toshinari SASAKI ,  Kosei NODA

IPC分类号： H01L29/04 ,  H01L21/20

CPC分类号： H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/385 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. An oxide semiconductor film serving as a channel formation region of a transistor is formed by a sputtering method at a temperature higher than 200° C., so that the number of water molecules eliminated from the oxide semiconductor film can be 0.5/nm3 or less according to thermal desorption spectroscopy. A substance including a hydrogen atom such as hydrogen, water, a hydroxyl group, or hydride which causes variation in the electric characteristics of a transistor including an oxide semiconductor is prevented from entering the oxide semiconductor film, whereby the oxide semiconductor film can be highly purified and made to be an electrically i-type (intrinsic) semiconductor.

摘要翻译： 本发明的目的是提供一种具有稳定的电特性和高可靠性的氧化物半导体的半导体装置。 通过溅射法在高于200℃的温度下形成用作晶体管的沟道形成区的氧化物半导体膜，从氧化物半导体膜中除去的水分子数可以为0.5nm / nm 3以下 到热解吸光谱。 包含氢原子的物质，例如氢，水，羟基或氢化物，其导致包括氧化物半导体的晶体管的电特性发生变化，从而防止氧化物半导体膜进入氧化物半导体膜，由此氧化物半导体膜可以被高度纯化 并制成电i型（本征）半导体。

公开(公告)号：US20120286260A1

公开(公告)日：2012-11-15

申请号：US13461808

申请日：2012-05-02

申请人： Kosei NODA ,  Shunpei YAMAZAKI ,  Tatsuya HONDA ,  Yusuke SEKINE ,  Hiroyuki TOMATSU

发明人： Kosei NODA ,  Shunpei YAMAZAKI ,  Tatsuya HONDA ,  Yusuke SEKINE ,  Hiroyuki TOMATSU

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/7869 ,  H01L21/0242 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02656 ,  H01L21/84 ,  H01L27/10873 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78609

摘要： A highly reliable transistor which includes an oxide semiconductor and has high field-effect mobility and in which a variation in threshold voltage is small is provided. By using the transistor, a high-performance semiconductor device, which has been difficult to realize, is provided. The transistor includes an oxide semiconductor film which contains two or more kinds, preferably three or more kinds of elements selected from indium, tin, zinc, and aluminum. The oxide semiconductor film is formed in a state where a substrate is heated. Further, oxygen is supplied to the oxide semiconductor film with an adjacent insulating film and/or by ion implantation in a manufacturing process of the transistor, so that oxygen deficiency which generates a carrier is reduced as much as possible. In addition, the oxide semiconductor film is highly purified in the manufacturing process of the transistor, so that the concentration of hydrogen is made extremely low.

摘要翻译： 提供了包括氧化物半导体并且具有高场效应迁移率并且其中阈值电压的变化小的高度可靠的晶体管。 通过使用晶体管，提供了难以实现的高性能半导体器件。 晶体管包括含有选自铟，锡，锌和铝中的两种或更多种，优选三种或更多种元素的氧化物半导体膜。 在加热基板的状态下形成氧化物半导体膜。 此外，在晶体管的制造过程中，通过相邻的绝缘膜和/或通过离子注入向氧化物半导体膜提供氧，从而尽可能地减少产生载流子的氧气缺乏。 此外，在晶体管的制造过程中，氧化物半导体膜被高度纯化，使得氢的浓度极低。

公开(公告)号：US20110084271A1

公开(公告)日：2011-04-14

申请号：US12899962

申请日：2010-10-07

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Kosei NODA

IPC分类号： H01L29/12 ,  H01L33/08 ,  B82Y99/00

CPC分类号： H01L27/1225 ,  B82Y30/00 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/45 ,  H01L29/4908

摘要： Disclosed is a highly reliable semiconductor device and a manufacturing method thereof, which is achieved by using a transistor with favorable electrical characteristics and high reliability as a switching element. The semiconductor device includes a driver circuit portion and a pixel portion over one substrate, and the pixel portion comprises a light-transmitting bottom-gate transistor. The light-transmitting bottom-gate transistor comprises: a transparent gate electrode layer; an oxide semiconductor layer over the gate electrode layer, a superficial layer of the oxide semiconductor layer including comprising a microcrystal group of nanocrystals; and source and drain electrode layers formed over the oxide semiconductor layer, the source and drain electrode layers comprising a light-transmitting oxide conductive layer.

摘要翻译： 公开了一种高可靠性的半导体器件及其制造方法，其通过使用具有良好的电特性和高可靠性的晶体管作为开关元件来实现。 半导体器件包括驱动电路部分和一个衬底上的像素部分，并且像素部分包括透光底栅晶体管。 透光底栅晶体管包括：透明栅极电极层; 在所述栅极电极层上的氧化物半导体层，所述氧化物半导体层的表面层包括微晶纳米晶体组; 以及形成在所述氧化物半导体层上的源极和漏极电极层，所述源极和漏极电极层包括透光氧化物导电层。

公开(公告)号：US20110008931A1

公开(公告)日：2011-01-13

申请号：US12832329

申请日：2010-07-08

申请人： Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Kosei NODA ,  Hiroki OHARA ,  Toshinari SASAKI ,  Junichiro SAKATA

发明人： Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Kosei NODA ,  Hiroki OHARA ,  Toshinari SASAKI ,  Junichiro SAKATA

IPC分类号： H01L21/36

CPC分类号： H01L29/66969 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/7869

摘要： A highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics, and a manufacturing method thereof. In the manufacturing method of the semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region is an oxide semiconductor layer, heat treatment which reduces impurities such as moisture to improve the purity of the oxide semiconductor layer and oxidize the oxide semiconductor layer (heat treatment for dehydration or dehydrogenation) is performed. Not only impurities such as moisture in the oxide semiconductor layer but also those existing in a gate insulating layer are reduced, and impurities such as moisture existing in interfaces between the oxide semiconductor layer and films provided over and under and in contact with the oxide semiconductor layer are reduced.

摘要翻译： 一种高度可靠的半导体器件及其制造方法，其包括具有稳定电特性的薄膜晶体管。 在包括具有沟道形成区域的半导体层是氧化物半导体层的薄膜晶体管的半导体器件的制造方法中，减少诸如水分的杂质的热处理以提高氧化物半导体层的纯度并氧化氧化物 进行半导体层（脱水或脱氢的热处理）。 氧化物半导体层中的水分等杂质，以及存在于栅极绝缘层中的杂质都会降低，氧化物半导体层和氧化物半导体层之间的界面中存在的杂质如氧化物半导体层和与氧化物半导体层接触的薄膜 减少了