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公开(公告)号：US12216912B2
公开(公告)日：2025-02-04
申请号：US17885823
申请日：2022-08-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seonghyeog Choi , Dong-Min Shin , Hong Rak Son , Hyeonjong Song , Yeongcheol Jo
Abstract: Disclosed herein are operation methods of a memory controller which controls a memory device. The method includes storing write data in a first area of the memory device, extracting first error position information indicating a position of at least one error included in data stored in the first area, storing the first error position information in a second area of the memory device, reading read data from the first area of the memory device, reading the first error position information from the second area of the memory device, refining the read data based on the first error position information to generate refined data, performing soft decision decoding based on the refined data to generate corrected data, and outputting the corrected data.
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公开(公告)号：US11456048B2
公开(公告)日：2022-09-27
申请号：US17392781
申请日：2021-08-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jongyoon Yoon , Hyeonjong Song , Seonghyeog Choi , Hongrak Son
Abstract: In a method of predicting a remaining lifetime of the nonvolatile memory device, a read sequence is performed. The read sequence includes a plurality of read operations, and at least one of the plurality of read operations is sequentially performed until read data stored in the nonvolatile memory device is successfully retrieved. Sequence class and error correction code (ECC) decoding information are generated. A life stage of the nonvolatile memory device is determined based on at least one of the sequence class and the ECC decoding information. When it is determined that the nonvolatile memory device corresponds to a first life stage, a coarse prediction on the remaining lifetime of the nonvolatile memory device is performed. When it is determined that the nonvolatile memory device corresponds to a second life stage after the first life stage, a fine prediction on the remaining lifetime of the nonvolatile memory device is performed.
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3.发明授权Nonvolatile memory device and related read method using hard and soft decision decoding 有权非易失性存储器件和相关的读取方法使用硬和软判决解码公开(公告)号：US08996964B2
公开(公告)日：2015-03-31
申请号：US13786509
申请日：2013-03-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seonghyeog Choi , Junjin Kong , Hong Rak Son , Pilsang Yoon
CPC classification number: H03M13/3784 , H03M13/3707 , H03M13/45
Abstract: A storage device comprises a nonvolatile memory device comprising a plurality of memory cells, and an error correction circuit configured to receive primary data and secondary data from the nonvolatile memory device and to perform a hard decision decoding operation on the primary data and further configured to perform a soft decision decoding operation on the primary data based on the secondary data. The primary data is read from the plurality of memory cells in a hard decision read operation and the secondary data is read from memory cells programmed to a specific state from among the primary data.
Abstract translation: 存储装置包括包括多个存储器单元的非易失性存储器件，以及错误校正电路，被配置为从非易失性存储器件接收主数据和辅助数据，并对主数据进行硬判决解码操作，并进一步被配置为执行 基于次要数据对主数据进行软判决解码操作。 在硬判决读取操作中从多个存储器单元中读取主数据，并且从主数据中从被编程到特定状态的存储器单元读取次数据。
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公开(公告)号：US20240395352A1
公开(公告)日：2024-11-28
申请号：US18790881
申请日：2024-07-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kangseok Lee , Geunyeong Yu , Seonghyeog Choi , Hongrak Son , Youngjun Hwang
Abstract: In a method of error correction code (ECC) decoding, normal read data are read from a nonvolatile memory device based on normal read voltages, and a first ECC decoding is performed with respect to the normal read data. When the first ECC decoding results in failure, flip read data are read from the nonvolatile memory device based on flip read voltages corresponding to a flip range of a threshold voltage. Corrected read data are generated based on the flip read data by inverting error candidate bits included in the flip range among bits of the normal read data, and a second ECC decoding is performed with respect to the corrected read voltage. Error correction capability may be enhanced by retrying ECC decoding based on the corrected read data when ECC decoding based on the normal read data results in failure.
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公开(公告)号：US11189358B2
公开(公告)日：2021-11-30
申请号：US16919187
申请日：2020-07-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seonghyeog Choi , Hongrak Son , Taehyun Song , Hyunsang Cho
Abstract: According to a method of controlling an operation of a nonvolatile memory device using machine learning, operating conditions of the nonvolatile memory device are determined by performing an inferring operation using a machine learning model. Training data that are generated based on feature information and error information are collected, where the error information indicate results of error correction code (ECC) decoding of the nonvolatile memory device. The machine learning model is updated by performing a learning operation based on the training data. Optimized operating conditions for individual user environments are provided by collecting training data in the storage system and performing the learning operation and the inferring operation based on the training data.
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Patent Agency Ranking
公开(公告)号：US09105359B2
公开(公告)日：2015-08-11
申请号：US13788592
申请日：2013-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seonghyeog Choi , Junjin Kong , Changkyu Seol , Hong Rak Son
CPC classification number: G11C29/50004 , G06F11/1048 , G11C2029/0411
Abstract: A data processing method is provided for processing data read from a nonvolatile memory. The data processing method includes receiving first bit data from the nonvolatile memory at a memory controller, and performing erasure decoding based on the first bit data and second bit data stored in the memory controller. The first bit data indicates a memory cell that is erasure, and the second bit data is read using a read voltage during previous error correction decoding.
Abstract translation: 提供了一种用于处理从非易失性存储器读取的数据的数据处理方法。 数据处理方法包括在存储器控制器处从非易失性存储器接收第一位数据，并且基于存储在存储器控制器中的第一位数据和第二位数据执行擦除解码。 第一位数据指示擦除的存储单元，并且在先前纠错解码期间使用读取电压读取第二位数据。
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公开(公告)号：US20250130891A1
公开(公告)日：2025-04-24
申请号：US18657360
申请日：2024-05-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seonghyeog Choi , Jiho Kim , Changkyu Seol , Yuseok Song , Daewook Kim
IPC: G06F11/10
Abstract: A memory system includes a semiconductor memory device and a memory controller to control the semiconductor memory device. The semiconductor memory device includes a memory cell array that is divided into a plurality of sub array blocks arranged in a first direction and a second direction. The memory controller includes an error correction code (ECC) engine. The ECC engine, in a write operation, generates a parity data by performing an ECC encoding on a user data including a plurality of sub data units, generates a main data by interleaving the sub data units based on mapping information such that two sub data units to be stored in one row of a target sub array block are included in one symbol. The mapping information indicates a mapping relationship between the plurality of sub data units and rows of the target sub array block storing the plurality of sub data units.
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公开(公告)号：US12080366B2
公开(公告)日：2024-09-03
申请号：US17854638
申请日：2022-06-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kangseok Lee , Geunyeong Yu , Seonghyeog Choi , Hongrak Son , Youngjun Hwang
CPC classification number: G11C29/52 , G11C29/021 , G11C29/022
Abstract: In a method of error correction code (ECC) decoding, normal read data are read from a nonvolatile memory device based on normal read voltages, and a first ECC decoding is performed with respect to the normal read data. When the first ECC decoding results in failure, flip read data are read from the nonvolatile memory device based on flip read voltages corresponding to a flip range of a threshold voltage. Corrected read data are generated based on the flip read data by inverting error candidate bits included in the flip range among bits of the normal read data, and a second ECC decoding is performed with respect to the corrected read voltage. Error correction capability may be enhanced by retrying ECC decoding based on the corrected read data when ECC decoding based on the normal read data results in failure.
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公开(公告)号：US12067287B2
公开(公告)日：2024-08-20
申请号：US17685024
申请日：2022-03-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kwanwoo Noh , Hyeonjong Song , Wijik Lee , Hongrak Son , Dongmin Shin , Seonghyeog Choi
CPC classification number: G06F3/0658 , G06F3/0614 , G06F3/0679 , G11C16/0483
Abstract: Provided are a memory controller calculating an optimal read level, a memory system including the memory controller, and an operating method of the memory controller. The memory controller includes: a processor configured to control a memory operation on the memory device; and a read level calculation module configured to: receive N counting values corresponding to N read levels generated based on a counting operation on data read by using a plurality of read levels, model at least two cell count functions having selected read levels that are selected from the N read levels as inputs, and the N counting values corresponding to the selected read levels as outputs, and calculate an optimal read level based on an optimal cell count function selected from the at least two cell count functions, wherein N is an integer equal to or greater than four, wherein the N counting values include counting values corresponding to at least four different read levels.
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公开(公告)号：US11361832B2
公开(公告)日：2022-06-14
申请号：US16990262
申请日：2020-08-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunseung Han , Seonghyeog Choi , Youngsuk Ra , Hong Rak Son , Taehyun Song , Bohwan Jun
Abstract: A storage device includes a nonvolatile memory device and a memory controller. The memory controller receives first data from the nonvolatile memory device based on a first read command, and performs error correction on the first data. When the error correction fails, the memory controller transmits a second read command and second read voltage information to the nonvolatile memory device, receives second data from the nonvolatile memory device, transmits a third read command and third read voltage information to the nonvolatile memory device, and receives third data from the nonvolatile memory device. The memory controller adjusts an offset based on the second data and the third data, transmits a fourth read command, fourth read voltage information, and the offset to the nonvolatile memory device, receives fourth data from the nonvolatile memory device, and performs a soft decision process based on the fourth data.
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