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公开(公告)号:US11818243B2
公开(公告)日:2023-11-14
申请号:US17343318
申请日:2021-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngsik Moon , Wijik Lee , Hongrak Son
CPC classification number: H04L9/008 , G06F21/602 , H04L9/0869
Abstract: An encryption device includes: a parameter generating circuit configured to generate an encryption parameter including a number of initial valid bits based on an operation scenario; an encryption circuit configured to generate a cipher text by encrypting a plain text received from the outside, based on the encryption parameter; an operation circuit configured to generate a final cipher text by performing a plurality of operations on the cipher text according to the operation scenario and tag, to the final cipher text, history information of the operations performed on the final cipher text; and a decryption circuit configured to generate a decrypted plain text by decrypting the final cipher text and output a number of reliable bits of the decrypted plain text based on the history information.
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公开(公告)号:US12067287B2
公开(公告)日:2024-08-20
申请号:US17685024
申请日:2022-03-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kwanwoo Noh , Hyeonjong Song , Wijik Lee , Hongrak Son , Dongmin Shin , Seonghyeog Choi
CPC classification number: G06F3/0658 , G06F3/0614 , G06F3/0679 , G11C16/0483
Abstract: Provided are a memory controller calculating an optimal read level, a memory system including the memory controller, and an operating method of the memory controller. The memory controller includes: a processor configured to control a memory operation on the memory device; and a read level calculation module configured to: receive N counting values corresponding to N read levels generated based on a counting operation on data read by using a plurality of read levels, model at least two cell count functions having selected read levels that are selected from the N read levels as inputs, and the N counting values corresponding to the selected read levels as outputs, and calculate an optimal read level based on an optimal cell count function selected from the at least two cell count functions, wherein N is an integer equal to or greater than four, wherein the N counting values include counting values corresponding to at least four different read levels.
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公开(公告)号:US11961553B2
公开(公告)日:2024-04-16
申请号:US17804851
申请日:2022-05-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Wijik Lee , Kwanwoo Noh , Hyeonjong Song
IPC: G11C7/00 , G11C11/4074 , G11C11/4078 , G11C11/4096
CPC classification number: G11C11/4096 , G11C11/4074 , G11C11/4078
Abstract: A nonvolatile memory device includes a plurality of memory cells that have a first state and a second state different from each other. A method of searching a read voltage of the nonvolatile memory device includes determining a number n that represents a number of times a data read operation is performed, selecting n read voltage levels of the read voltage such that a number of read voltage levels is equal to the number of times the data read operation, where the n read voltage levels differ from each other, generating n cell count values by performing n data read operations on the plurality of memory cells using all of the n read voltage levels, and generating an optimal read voltage level of the read voltage by performing a regression analysis based on a first-order polynomial using the n read voltage levels and the n cell count values.
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公开(公告)号:US20220182073A1
公开(公告)日:2022-06-09
申请号:US17478002
申请日:2021-09-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KANGSEOK LEE , Geunyeong Yu , Heeyoul Kwak , Hongrak Son , Dongmin Shin , Wijik Lee , Bohwan Jun , Youngjun Hwang
Abstract: A method of responding to a read request from a host includes: obtaining read data from a memory device, performing first iteration ECC decoding on the read data to generate a plurality of pieces of decoded data, selecting one of the plurality of pieces of decoded data as intermediate data as intermediate data, generating preprocessed data based on the read data and the intermediate data and performing second iteration ECC decoding on the preprocessed data when the first iteration ECC decoding fails, and outputting the intermediate data to the host when the first iteration ECC decoding succeeds.
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公开(公告)号:US11664826B2
公开(公告)日:2023-05-30
申请号:US17478002
申请日:2021-09-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kangseok Lee , Geunyeong Yu , Heeyoul Kwak , Hongrak Son , Dongmin Shin , Wijik Lee , Bohwan Jun , Youngjun Hwang
CPC classification number: H03M13/2948 , H03M13/096 , H03M13/1108 , H03M13/1575
Abstract: A method of responding to a read request from a host includes: obtaining read data from a memory device, performing first iteration ECC decoding on the read data to generate a plurality of pieces of decoded data, selecting one of the plurality of pieces of decoded data as intermediate data as intermediate data, generating preprocessed data based on the read data and the intermediate data and performing second iteration ECC decoding on the preprocessed data when the first iteration ECC decoding fails, and outputting the intermediate data to the host when the first iteration ECC decoding succeeds.
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公开(公告)号:US11632232B2
公开(公告)日:2023-04-18
申请号:US17167203
申请日:2021-02-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaehun Jang , Youngsik Moon , Wijik Lee , Hongrak Son
Abstract: A client system includes a client-side host device, and a client-side storage device including a storage controller and a storage memory. The storage controller includes a host interface, a processor configured to control a read operation and a write operation for the storage memory, and a homomorphic encryption and decryption accelerator configured to, based on receiving a read request from the client-side host device, perform homomorphic encryption on first plaintext data that is read from the storage memory, to generate first homomorphic ciphertext data, and provide the first homomorphic ciphertext data to the client-side host device through the host interface, and based on receiving a write request from the client-side host device, perform homomorphic decryption on second homomorphic ciphertext data that is received through the host interface, to generate second plaintext data, and write the second plaintext data in the storage memory.
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公开(公告)号:US20230112694A1
公开(公告)日:2023-04-13
申请号:US17750581
申请日:2022-05-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eun Chu Oh , Junyeong Seok , Younggul Song , Wijik Lee , Byungchul Jang
Abstract: A storage device includes a nonvolatile memory device including a memory cell array and a storage controller to control the nonvolatile memory device. The memory cell array includes word-lines, memory cells and word-line cut regions dividing the word-lines into memory blocks. The storage controller includes an error correction code (ECC) engine including an ECC encoder and a memory interface. The ECC encoder performs a first ECC encoding operation on each of sub data units in user data to generate parity bits and generate a plurality of ECC sectors, selects outer cell bits to be stored in outer cells to constitute an outer ECC sector including the outer cell bits and performs a second ECC encoding operation on the outer ECC sector to generate outer parity bits. The memory interface transmits, to the nonvolatile memory device, a codeword set including the ECC sectors and the outer parity bits.
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公开(公告)号:US20230139330A1
公开(公告)日:2023-05-04
申请号:US17664889
申请日:2022-05-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Wijik Lee , Dongouk Moon , Seunghan Lee , Jinwook Lee
Abstract: Storage devices and systems implementing blockchain networks based on proof of space (PoS) are described. A PoS module may be configured to perform PoS processing of PoS data transferred through an interface circuit to generate operation data. A security module may be configured to perform encryption of user data (to generate first encrypted data) and encryption of the operation data (to generate second encrypted data) using different encryption algorithms. A nonvolatile memory device may then store the first encrypted data and the second encrypted data in different namespaces (e.g., user data may be stored in a user namespace and PoS data may be stored in a PoS namespace). Accordingly, interference and/or malicious effect between the user data and the PoS data may be reduced (e.g., blocked) and stability of the PoS algorithm may be enhanced.
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公开(公告)号:US20230102226A1
公开(公告)日:2023-03-30
申请号:US17664905
申请日:2022-05-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Minho Kim , Wijik Lee , Sooyoung Ji , Sanghwa Jin
Abstract: A computational storage device includes a nonvolatile memory configured to store a plurality of embedding tables for a deep-learning recommendation system (DLRS), and a storage controller configured to control an operation of the nonvolatile memory, store a plurality of applications that are off-loaded from a host device executing the DLRS, and support an execution of the DLRS by executing the plurality of applications and performing a plurality of calculations based on the plurality of embedding tables. The storage controller includes a machine learning engine configured to determine a management scheme of at least one embedding table of the plurality of embedding tables and the plurality of applications by analyzing the at least one embedding table and the plurality of applications.
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公开(公告)号:US11575502B2
公开(公告)日:2023-02-07
申请号:US17115161
申请日:2020-12-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Wijik Lee , Youngsik Moon , Hongrak Son , Jaehun Jang
Abstract: A homomorphic encryption processing device includes the processing circuitry is configured to generate ciphertext operation level information based on field information. The field information represents a technology field to which homomorphic encryption processing is applied. The ciphertext operation level information represents a maximum number of multiplication operations between homomorphic ciphertexts without a bootstrapping process. The processing circuitry is further configured to select and output a homomorphic encryption parameter based on the ciphertext operation level information. The processing circuitry is further configured to perform one of a homomorphic encryption, a homomorphic decryption and a homomorphic operation, based on the homomorphic encryption parameter. The homomorphic encryption processing device may adaptively generate a homomorphic encryption parameter according to a ciphertext operation level information determined based on a field information, and may perform a homomorphic encryption, a homomorphic decryption and a homomorphic operation based on the homomorphic encryption parameter.
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