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公开(公告)号：US10467133B2
公开(公告)日：2019-11-05
申请号：US15064185
申请日：2016-03-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Amitai Perlstein , Eun Chu Oh , Amir Bennatan , Junjin Kong , Hong Rak Son
IPC: G06F12/02
Abstract: A storage device is provided as follows. A nonvolatile memory device includes blocks, each block having sub-blocks erased independently. A memory controller performs a garbage collection operation on the nonvolatile memory device by selecting a garbage collection victim sub-block among the sub-blocks and erasing the selected garbage collection victim sub-block to generate a free sub-block. The memory controller selects the garbage collection victim sub-block using valid page information of each sub-block and valid page information of memory cells adjacent to each sub-block.
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公开(公告)号：US10459788B2
公开(公告)日：2019-10-29
申请号：US15676623
申请日：2017-08-14
Inventor： Donghwan Lee , Sae-Young Chung , Lanying Zhao , Sungik Choi , Junjin Kong , Changkyu Seol , Hyejeong So , Hong Rak Son
Abstract: A method of decoding may include performing fewer than ⌊ 2 k - 1 k ⌋ number of sensing operations of multilevel cells within a nonvolatile memory device, decoding pages corresponding to each of the sensing operations while correcting a channel error using an RIO code, and extracting user data from the decoded pages.
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公开(公告)号：US09734898B2
公开(公告)日：2017-08-15
申请号：US14308739
申请日：2014-06-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Changkyu Seol , Junjin Kong , Hyejeong So , Hong Rak Son
CPC classification number: G11C11/5621 , G06F12/0246 , G06F2212/72
Abstract: A memory controller includes a state shaping encoder that receives k-bit write data, selects a logical page with reference to state shape mapping information, and changes data of the logical page to decrease an occurrence probability of a high-order program state among program states used to program the k-bit data in multi-level memory cells.
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公开(公告)号：US10134476B2
公开(公告)日：2018-11-20
申请号：US15857898
申请日：2017-12-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dongsup Jin , Pilsang Yoon , Hong Rak Son , Junjin Kong , Young-Seop Shim , Jinman Han
IPC: G11C7/00 , G11C16/26 , G06F3/06 , G11C16/04 , G11C7/02 , G11C16/28 , G11C29/02 , G11C29/50 , G11C11/56 , G11C29/04
Abstract: A method for controlling a nonvolatile memory device includes requesting a plurality of first sampling values from the nonvolatile memory device, each of the first sampling values representing the number of memory cells having a threshold voltage between a first sampling read voltage and a second sampling read voltage. The first sampling values are processed through a non-linear filtering operation to estimate the number of memory cells having the threshold voltage between the first sampling read voltage and the second sampling read voltage.
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5.发明授权公开(公告)号：US10108494B2
公开(公告)日：2018-10-23
申请号：US15288227
申请日：2016-10-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Geunyeong Yu , Junjin Kong , Beom Kyu Shin , Myungkyu Lee , Jiyoup Kim , Dongmin Shin
Abstract: A redundant array of inexpensive disks (RAID) controller of a RAID storage system that includes one or more storage devices includes an error correction code (ECC) result manager configured to manage information of ECC result indicators when a data chunk that includes one or more ECC data units having an uncorrectable ECC error is read from among a plurality of data chunks dispersively stored in the one or more storage devices, each of the plurality of data chunks including a plurality of ECC data units, the ECC result indicators respectively indicating whether the plurality of ECC data units included in the plurality of data chunks has an uncorrectable ECC error; and an uncorrectable error counter configured to calculate a number of ECC result indicators indicating an uncorrectable ECC error among ECC result indicators corresponding to ECC data units having a same order in each of the plurality of data chunks.
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Patent Agency Ranking
公开(公告)号：US09923580B2
公开(公告)日：2018-03-20
申请号：US14877448
申请日：2015-10-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kijun Lee , Myungkyu Lee , Sejin Lim , Junjin Kong
CPC classification number: H03M13/3715 , H03M13/1525 , H03M13/1545 , H03M13/157
Abstract: The inventive concepts relate to an operation method of an error correction decoder correcting an error of data read from a nonvolatile memory. The operation method may include receiving the data from the nonvolatile memory, performing a first error correction with respect to the received data in a simplified mode, and performing, when the first error correction fails in the simplified mode, a second error correction with respect to the received data in a full mode. When the first error correction of the simplified mode is performed, a part of operations of the second error correction of the full mode may be omitted.
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7.发明授权Code modulation encoder and decoder, memory controller including them, and flash memory system 有权代码调制编码器和解码器，包括它们的存储器控制器以及闪存系统公开(公告)号：US09411679B2
公开(公告)日：2016-08-09
申请号：US13834010
申请日：2013-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Changkyu Seol , Junjin Kong , Hong Rak Son , Younggeon Yoo
CPC classification number: G06F11/1008 , G06F11/1044 , G06F11/1072 , G06F12/0246 , G11C11/5642 , G11C16/26 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582
Abstract: Disclosed is a bit-state mapping method of a flash memory system which maps m-bit data (m being a natural number more than 2) onto one of 2m states (voltage threshold distributions). The bit-state mapping method includes performing a subset partitioning operation during first to (m−1)th levels under a condition that two adjacent states are processed as one state; and distinguishing between the adjacent states while processing an (m)th level.
Abstract translation: 公开了一种闪存系统的位状态映射方法，其将m比特数据（m是大于2的自然数）映射到2m状态之一（电压阈值分布）。 位状态映射方法包括在将两个相邻状态处理为一个状态的条件下，在第一至第（m-1）级执行子集划分操作; 并且在处理（m）级时区分相邻状态。
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公开(公告)号：US09105359B2
公开(公告)日：2015-08-11
申请号：US13788592
申请日：2013-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seonghyeog Choi , Junjin Kong , Changkyu Seol , Hong Rak Son
CPC classification number: G11C29/50004 , G06F11/1048 , G11C2029/0411
Abstract: A data processing method is provided for processing data read from a nonvolatile memory. The data processing method includes receiving first bit data from the nonvolatile memory at a memory controller, and performing erasure decoding based on the first bit data and second bit data stored in the memory controller. The first bit data indicates a memory cell that is erasure, and the second bit data is read using a read voltage during previous error correction decoding.
Abstract translation: 提供了一种用于处理从非易失性存储器读取的数据的数据处理方法。 数据处理方法包括在存储器控制器处从非易失性存储器接收第一位数据，并且基于存储在存储器控制器中的第一位数据和第二位数据执行擦除解码。 第一位数据指示擦除的存储单元，并且在先前纠错解码期间使用读取电压读取第二位数据。
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公开(公告)号：US10726879B2
公开(公告)日：2020-07-28
申请号：US15836067
申请日：2017-12-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Amit Berman , Junjin Kong , Uri Beitler
IPC: G11C5/14 , G11C11/24 , G11C11/00 , G06F3/06 , G11C7/04 , G11C11/56 , G11C16/10 , G11C16/30 , G11C11/4093
Abstract: A solid-state drive (SSD) may include a volatile buffer such as DRAM, a non-volatile memory (NVM) such as NAND Flash connected to the volatile buffer, and a capacitor connected to both, where the capacitor may have an energy capacity insufficient to supply the buffer and NVM using a normal supply voltage in a normal mode, but sufficient to supply the buffer and NVM using at least one reduced supply voltage in a temporary mode; and a related method may include programming data to the NVM by temporarily reducing the supply voltage to the NVM, and writing data to the NVM using the reduced supply voltage.
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公开(公告)号：US10374630B2
公开(公告)日：2019-08-06
申请号：US15652260
申请日：2017-07-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jiyoup Kim , Dong-Min Shin , Beomkyu Shin , Junjin Kong , Hong Rak Son
Abstract: A low-density parity check (LDPC) decoder may include a variable node processing unit and a check node processing unit. The check node processing unit includes memory elements storing a check node value. The memory elements are interconnected through two or more paths, and each of the paths may include a total or partial cyclic permutation of the memory elements to transmit the check node value.
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