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公开(公告)号：US10854754B2
公开(公告)日：2020-12-01
申请号：US16932076
申请日：2020-07-17
发明人： Sung Soo Kim , Dong Hyun Roh , Koung Min Ryu , Sang Jin Hyun
IPC分类号： H01L29/78 , H01L29/417 , H01L29/66 , H01L29/423 , H01L27/12 , H01L27/092
摘要： A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.
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公开(公告)号：US10600913B2
公开(公告)日：2020-03-24
申请号：US16100804
申请日：2018-08-10
发明人： Won Keun Chung , Jong Ho Park , Seung Ha Oh , Sang Yong Kim , Hoon Joo Na , Sang Jin Hyun
IPC分类号： H01L29/78 , H01L29/775 , H01L29/06 , H01L29/66 , H01L29/423 , B82Y10/00 , H01L29/786 , H01L29/49 , H01L29/51 , H01L21/283 , H01L21/324
摘要： A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes first and second gate stack structures formed in first and second regions, respectively, wherein the first gate stack structure is formed adjacent a first channel region and comprises a first gate insulating film having a first thickness formed on the first channel region, a first function film having a second thickness formed on the first gate insulating film and a first filling film having a third thickness formed on the first function film, wherein the second gate stack structure is formed adjacent a second channel region and comprises a second gate insulating film having the first thickness formed on the second channel region, a second function film having the second thickness formed on the second gate insulating film and a second filling film having the third thickness formed on the second function film, wherein the first and second function films, respectively, comprise TiN and Si concentrations that are different from each other.
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公开(公告)号：US12087833B2
公开(公告)日：2024-09-10
申请号：US18380754
申请日：2023-10-17
发明人： Heon Bok Lee , Dae Yong Kim , Wan Don Kim , Jeong Hyuk Yim , Won Keun Chung , Hyo Seok Choi , Sang Jin Hyun
IPC分类号： H01L29/417 , H01L21/768 , H01L29/08 , H01L29/66 , H01L29/78
CPC分类号： H01L29/41775 , H01L21/76897 , H01L29/0847 , H01L29/41791 , H01L29/6681 , H01L29/7851
摘要： A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction, a gate electrode on the active pattern, the gate electrode extending in a second direction intersecting the first direction and including a first portion and a second portion arranged along the second direction, a first contact plug on the gate electrode, the first contact plug being connected to a top surface of the second portion of the gate electrode, a source/drain region in the active pattern on a sidewall of the gate electrode, and a source/drain contact on the source/drain region, a height of a top surface of the source/drain contact being higher than a top surface of the first portion of the gate electrode and lower than the top surface of the second portion of the gate electrode.
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公开(公告)号：US11799004B2
公开(公告)日：2023-10-24
申请号：US17694759
申请日：2022-03-15
发明人： Heon Bok Lee , Dae Yong Kim , Wan Don Kim , Jeong Hyuk Yim , Won Keun Chung , Hyo Seok Choi , Sang Jin Hyun
IPC分类号： H01L29/417 , H01L29/66 , H01L29/08 , H01L21/768 , H01L29/78
CPC分类号： H01L29/41775 , H01L21/76897 , H01L29/0847 , H01L29/41791 , H01L29/6681 , H01L29/7851
摘要： A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction, a gate electrode on the active pattern, the gate electrode extending in a second direction intersecting the first direction and including a first portion and a second portion arranged along the second direction, a first contact plug on the gate electrode, the first contact plug being connected to a top surface of the second portion of the gate electrode, a source/drain region in the active pattern on a sidewall of the gate electrode, and a source/drain contact on the source/drain region, a height of a top surface of the source/drain contact being higher than a top surface of the first portion of the gate electrode and lower than the top surface of the second portion of the gate electrode.
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5.发明申请公开(公告)号：US20200343350A1
公开(公告)日：2020-10-29
申请号：US16916643
申请日：2020-06-30
发明人： Heon Bok Lee , Chul Sung Kim , Sang Jin Hyun
IPC分类号： H01L29/417 , H01L29/08 , B82Y10/00 , H01L29/786 , H01L29/66 , H01L29/775 , H01L21/285 , H01L21/768 , H01L29/06 , H01L29/423 , H01L29/45 , H01L29/78
摘要： A gate all around field effect transistor (GAAFET) device may include a plurality of nanostructures that are spaced apart from one another in a channel region of the FET device above a substrate. A gate electrode can be in a GAA arrangement with the plurality of nanostructures and a semiconductor pattern can be on one side of the gate electrode. A contact in a contact trench in the semiconductor pattern and a silicide film can extend conformally on a side wall of the contact trench to a level in the channel region that is lower an uppermost one of the plurality of nanostructures.
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公开(公告)号：US10566326B2
公开(公告)日：2020-02-18
申请号：US15643062
申请日：2017-07-06
发明人： Dae Young Kwak , Ki Byung Park , Kyoung Hwan Yeo , Seung Jae Lee , Kyung Yub Jeon , Seung Seok Ha , Sang Jin Hyun
IPC分类号： H01L27/088 , H01L21/8234 , H01L29/66
摘要： Semiconductor devices are provided. A semiconductor device includes a semiconductor substrate. The semiconductor device includes first and second source/drain regions in the semiconductor substrate. Moreover, the semiconductor device includes a multi-layer device isolation region in the semiconductor substrate between the first and second source/drain regions. The multi-layer device isolation region includes a protruding portion that protrudes away from the semiconductor substrate beyond respective uppermost surfaces of the first and second source/drain regions.
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公开(公告)号：US10559687B2
公开(公告)日：2020-02-11
申请号：US15974775
申请日：2018-05-09
发明人： Jae Yeol Song , Su Young Bae , Dong Soo Lee , Hyung Suk Jung , Sang Jin Hyun
IPC分类号： H01L29/78 , H01L29/66 , H01L29/423 , H01L21/8234 , H01L29/51
摘要： A semiconductor device including a substrate; a first and second active region on the substrate; a first recess intersecting with the first active region; a second recess intersecting with the second active region; a gate spacer extending along sidewalls of the first and second recess; a first lower high-k dielectric film in the first recess and including a first high-k dielectric material in a first concentration and a second high-k dielectric material; a second lower high-k dielectric film in the second recess and including the first high-k dielectric material in a second concentration that is greater than the first concentration, and the second high-k dielectric material; a first metal-containing film on the first lower high-k dielectric film and including silicon in a third concentration; and a second metal-containing film on the second lower high-k dielectric film and including silicon in a fourth concentration that is smaller than the third concentration.
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公开(公告)号：US10366955B2
公开(公告)日：2019-07-30
申请号：US15806527
申请日：2017-11-08
发明人： Tae Yeol Kim , Ji Won Kang , Chung Hwan Shin , Jin Il Lee , Sang Jin Hyun
IPC分类号： H01L21/768 , H01L23/532 , H01L23/528 , H01L29/06 , H01L23/535 , H01L29/417 , B24B37/04 , H01L21/321 , H01L21/285 , C23C16/455
摘要： A semiconductor device and a method of forming the same, the semiconductor device including an insulating structure having an opening; a conductive pattern disposed in the opening; a barrier structure covering a bottom surface of the conductive pattern, the barrier structure extending between the conductive pattern and side walls of the opening; and a nucleation structure disposed between the conductive pattern and the barrier structure. The nucleation structure includes a first nucleation layer that contacts the barrier structure, and a second nucleation layer that contacts the conductive pattern, and a top end portion of the second nucleation layer is higher than a top end portion of the first nucleation layer.
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公开(公告)号：US20180254338A1
公开(公告)日：2018-09-06
申请号：US15697678
申请日：2017-09-07
发明人： Sung Soo Kim , Dong Hyun Roh , Koung Min Ryu , Sang Jin Hyun
IPC分类号： H01L29/78 , H01L29/66 , H01L29/417
CPC分类号： H01L29/785 , H01L27/0924 , H01L27/1211 , H01L29/41791 , H01L29/42376 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L2029/7858
摘要： A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.
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公开(公告)号：US11967630B2
公开(公告)日：2024-04-23
申请号：US17669859
申请日：2022-02-11
发明人： Byoung Hoon Lee , Wan Don Kim , Jong Ho Park , Sang Jin Hyun
IPC分类号： H01L29/51 , H01L29/423 , H01L29/49 , H01L29/775 , H01L29/786
CPC分类号： H01L29/511 , H01L29/42392 , H01L29/4966 , H01L29/518 , H01L29/775 , H01L29/78696
摘要： A semiconductor device is provided. The semiconductor device comprising a multi-channel active pattern on a substrate, a high dielectric constant insulating layer formed along the multi-channel active pattern on the multi-channel active pattern, wherein the high dielectric constant insulating layer comprises a metal, a silicon nitride layer formed along the high dielectric constant insulating layer on the high dielectric constant insulating layer and a gate electrode on the silicon nitride layer.
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