公开(公告)号：US20180090493A1

公开(公告)日：2018-03-29

申请号：US15643062

申请日：2017-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae Young Kwak ,  Ki Byung Park ,  Kyoung Hwan Yeo ,  Seung Jae Lee ,  Kyung Yub Jeon ,  Seung Seok Ha ,  Sang Jin Hyun

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/66

Abstract: Semiconductor devices are provided. A semiconductor device includes a semiconductor substrate. The semiconductor device includes first and second source/drain regions in the semiconductor substrate. Moreover, the semiconductor device includes a multi-layer device isolation region in the semiconductor substrate between the first and second source/drain regions. The multi-layer device isolation region includes a protruding portion that protrudes away from the semiconductor substrate beyond respective uppermost surfaces of the first and second source/drain regions.

公开(公告)号：US10566326B2

公开(公告)日：2020-02-18

申请号：US15643062

申请日：2017-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae Young Kwak ,  Ki Byung Park ,  Kyoung Hwan Yeo ,  Seung Jae Lee ,  Kyung Yub Jeon ,  Seung Seok Ha ,  Sang Jin Hyun

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/66

Abstract: Semiconductor devices are provided. A semiconductor device includes a semiconductor substrate. The semiconductor device includes first and second source/drain regions in the semiconductor substrate. Moreover, the semiconductor device includes a multi-layer device isolation region in the semiconductor substrate between the first and second source/drain regions. The multi-layer device isolation region includes a protruding portion that protrudes away from the semiconductor substrate beyond respective uppermost surfaces of the first and second source/drain regions.

公开(公告)号：US09741854B2

公开(公告)日：2017-08-22

申请号：US14959457

申请日：2015-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keun Hee Bai ,  Kyoung Hwan Yeo ,  Seung Seok Ha ,  Seung Ju Park ,  Do Hyoung Kim ,  Myeong Cheol Kim ,  Jae Hyoung Koo ,  Ki Byung Park

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66818 ,  H01L29/7851

Abstract: There is provided a method for manufacturing a semiconductor device including a substrate including a plurality of active regions, a plurality of gate electrodes extending in a first direction to intersect a portion of the plurality of active regions, and including first and second gate electrodes disposed to be adjacent to each other in the first direction, a gate isolation portion disposed between the first and second gate electrodes. The gate isolation portion includes a first layer and second layers disposed on both ends of the first layer in a second direction perpendicular to the first direction.