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    MAGNETIC MEMORY DEVICE
    2.
    发明申请
    MAGNETIC MEMORY DEVICE 有权

    公开(公告)号：US20210159272A1

    公开(公告)日：2021-05-27

    申请号：US16887541

    申请日：2020-05-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Han-Na CHO ,  Bok-Yeon WON ,  Oik KWON

    IPC: H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L23/522 ,  H01L23/528

    Abstract: A magnetic memory device includes a substrate including a cell region and a peripheral circuit region, lower contact plugs on the cell region, data storage structures on the lower contact plugs, and a peripheral interconnection structure on the peripheral circuit region. The peripheral interconnection structure includes a line portion extending in a direction parallel to a top surface of the substrate, and contact portions extending from the line portion toward the substrate. A height of each of the contact portions is less than a height of each of the lower contact plugs.

    MAGNETIC MEMORY DEVICES
    4.
    发明申请
    MAGNETIC MEMORY DEVICES 有权

    公开(公告)号：US20210391384A1

    公开(公告)日：2021-12-16

    申请号：US17460635

    申请日：2021-08-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Han-Na CHO ,  Bok-Yeon WON ,  Oik KWON

    IPC: H01L27/22 ,  H01L43/02 ,  H01L23/528 ,  H01L23/522 ,  H01L43/10

    Abstract: A magnetic memory device includes a substrate including a cell region and a peripheral circuit region, lower contact plugs on the cell region, data storage structures on the lower contact plugs, and a peripheral interconnection structure on the peripheral circuit region. The peripheral interconnection structure includes a line portion extending in a direction parallel to a top surface of the substrate, and contact portions extending from the line portion toward the substrate. A height of each of the contact portions is less than a height of each of the lower contact plugs.

    MEMORY DEVICES
    5.
    发明申请
    MEMORY DEVICES 有权

    公开(公告)号：US20210202311A1

    公开(公告)日：2021-07-01

    申请号：US17026525

    申请日：2020-09-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangkuk KIM ,  Yunseung KANG ,  Oik KWON ,  Jungik OH ,  Sujin JEON

    IPC: H01L21/768 ,  H01L27/24 ,  H01L27/22 ,  H01L43/12 ,  H01L45/00

    Abstract: A memory device including a plurality of first conductive lines arranged on a substrate and spaced apart from each other in a first direction parallel to a top surface of the substrate; a plurality of capping liners on sidewalls of each of the plurality of first conductive lines, the plurality of capping liners having top surfaces at a vertical level equal to top surfaces of the plurality of first conductive lines, and bottom surfaces at a vertical level higher than bottom surfaces of the plurality of first conductive lines; and an insulating layer on the substrate, the insulating layer filling spaces between the plurality of first conductive lines and covering sidewalls of the plurality of capping liners.

    SEMICONDUCTOR DEVICES
    6.
    发明申请
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20190189502A1

    公开(公告)日：2019-06-20

    申请号：US16015809

    申请日：2018-06-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Inho Kim ,  Woohyun LEE ,  Oik KWON ,  Sang-Kuk KIM ,  Yeonji KIM ,  Jongchul PARK

    IPC: H01L21/768 ,  H01L27/22 ,  H01L43/12

    CPC classification number: H01L21/76816 ,  H01L21/76804 ,  H01L27/11573 ,  H01L27/224 ,  H01L27/228 ,  H01L43/02 ,  H01L43/12

    Abstract: A semiconductor device includes a first lower insulating interlayer, a protection insulating layer, and a first upper insulating interlayer that are sequentially stacked on a substrate, and a conductive pattern penetrating the first upper insulating interlayer, the protection insulating layer; and the first lower insulating interlayer. The conductive pattern includes a line part extending in a direction parallel to an upper surface of the substrate and contact parts extending from the line part toward the substrate. The contact parts are separated from each other with an insulating pattern therebetween. The insulating pattern includes a portion of each of the first upper insulating interlayer, the protection insulating layer, and the first lower insulating interlayer. At least a portion of the insulating pattern has a stepped profile.

    MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20190165261A1

    公开(公告)日：2019-05-30

    申请号：US16009556

    申请日：2018-06-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang-Kuk KIM ,  Oik KWON ,  Dongkyu LEE ,  Kyungil HONG

    IPC: H01L43/12 ,  H01L27/22 ,  H01L43/02

    Abstract: A method of fabricating a magnetic memory device may include forming a magnetic tunnel junction layer on a substrate, sequentially forming a top electrode pattern and a mask pattern on the magnetic tunnel junction layer, patterning the magnetic tunnel junction layer using the mask pattern and the top electrode pattern as a first etch mask to form a magnetic tunnel junction pattern, forming a protection layer on side surfaces of the mask pattern, the top electrode pattern, and the magnetic tunnel junction pattern, the protection layer being extended to cover a first top surface of the mask pattern, removing a portion of the protection layer on the first top surface of the mask pattern to expose the first top surface of the mask pattern, and removing the mask pattern to expose a second top surface of the top electrode pattern.

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