公开(公告)号：US10756092B2

公开(公告)日：2020-08-25

申请号：US16814387

申请日：2020-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

Abstract: A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.

公开(公告)号：US20180366468A1

公开(公告)日：2018-12-20

申请号：US16110658

申请日：2018-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk PARK ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

CPC classification number: H01L27/10855 ,  H01L22/32 ,  H01L22/34 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10876 ,  H01L27/10894

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

公开(公告)号：US12125869B2

公开(公告)日：2024-10-22

申请号：US17542720

申请日：2021-12-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kiwon Park ,  Geunwoo Ko ,  Inho Kim ,  Sungwook Lee ,  Jonghyun Lee ,  Byungchul Choi

IPC: H01L27/15

CPC classification number: H01L27/156

Abstract: A semiconductor light emitting device is provided. The semiconductor light emitting device includes a plurality of light emitting structures, each of which includes a first surface and a second surface, a plurality of embossed portions provided on the first surface; a partition wall structure provided on the first surface of the plurality of light emitting structures and including a plurality of partition walls which define a plurality of pixel spaces; and a fluorescent layer provided in the plurality of pixel spaces. A bottom surface of the partition wall structure contacts the plurality of embossed portions.

公开(公告)号：US12125019B2

公开(公告)日：2024-10-22

申请号：US17671050

申请日：2022-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongwan Lee ,  Inho Kim ,  Yongseok Park ,  Seongmin Je

IPC: G06Q20/32 ,  G06Q20/40

CPC classification number: G06Q20/3224 ,  G06Q20/3267 ,  G06Q20/40

Abstract: An electronic device is provided. The electronic device includes a communication module, at least one processor, and a memory configured to be operatively coupled to the at least one processor, wherein the memory stores instructions configured to, when executed, cause the at least one processor to identify information on a first country in which the electronic device is located through the communication module, perform payment based on a first authentication method corresponding to the identified information on the first country in response to a first payment application execution request, and change the first authentication method to a second authentication method corresponding to information on a second country in response to detection of a change from the first country to the second country through the communication module.

公开(公告)号：US20240074208A1

公开(公告)日：2024-02-29

申请号：US18300021

申请日：2023-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoungjae BAE ,  Seungpil Ko ,  Inho Kim ,  Hyungjiong Jeong

IPC: H10B61/00

CPC classification number: H10B61/00

Abstract: A semiconductor device includes an etch stop layer, an insulating layer on the etch stop layer, and a contact structure passing through the etch stop layer and the insulating layer, the contact structure including a first conductive layer, a second conductive layer having a side surface and a lower surface facing the first conductive layer, a third conductive layer on an upper surface of the second conductive layer, and a natural oxide film between the first conductive layer and the second conductive layer and between the second conductive layer and the third conductive layer, the first to third conductive layers including metal or metal nitride, and the natural oxide film including metal oxide.

公开(公告)号：US11804513B2

公开(公告)日：2023-10-31

申请号：US17181213

申请日：2021-02-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangbum Lee ,  Inho Kim ,  Geunwoo Ko ,  Yongmin Kwon ,  Juhyun Kim ,  Jungwook Lee

IPC: H01L27/15 ,  H01L33/00 ,  H01L33/38 ,  H01L33/44 ,  H01L33/50 ,  H01L33/60 ,  H01L33/62

CPC classification number: H01L27/156 ,  H01L33/0093 ,  H01L33/382 ,  H01L33/44 ,  H01L33/505 ,  H01L33/60 ,  H01L33/62 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0041 ,  H01L2933/0058 ,  H01L2933/0066

Abstract: A semiconductor light-emitting device includes a light-emitting pixel region and a pad region, and includes light-emitting structures, a partition wall structure, a passivation structure, and a fluorescent layer, positioned in the light-emitting pixel region, and a pad unit positioned in the pad region. The partition wall structure includes partition walls defining pixel spaces. The passivation structure surrounds the partition walls and includes a first passivation layer including a first insulating material and a second passivation layer including a second insulating material different from the first insulating material. The passivation structure includes a first portion on a top surface of the partition walls, a second portion on a sidewall of the partition walls, and a third portion between the light-emitting structures and the fluorescent layer. A first thickness of the first portion is less than or equal to a second thickness of the second portion.

公开(公告)号：US11264532B2

公开(公告)日：2022-03-01

申请号：US16727496

申请日：2019-12-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Daeyeop Han ,  Kiwon Park ,  Jaeyoon Kim ,  Sungjoon Kim ,  Inho Kim

IPC: H01L33/00 ,  H01L25/075

Abstract: Provided a manufacturing method of a semiconductor light emitting device including forming a plurality of light emitting cells that are separated on a first substrate, forming a first planarization layer by providing an insulating material on the plurality of light emitting cells, forming a second planarization layer by providing a photoresist on the first planarization layer to have a flat upper surface, and soft baking the photoresist, and dry etching the second planarization layer to a predetermined depth to expose a portion of the first planarization layer provided on the plurality of light emitting cells, and a portion of the second planarization layer remaining between the plurality of light emitting cells on the first planarization layer, wherein forming the second planarization layer and dry etching are repeated at least once to remove the portion of the second planarization layer provided between the plurality of light emitting cells.

公开(公告)号：US10396277B2

公开(公告)日：2019-08-27

申请号：US15970963

申请日：2018-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woohyun Lee ,  Sang-Kuk Kim ,  Oik Kwon ,  Inho Kim ,  Jongchul Park ,  Kwangyoung Oh

IPC: H01L43/08 ,  H01F10/32 ,  H01L43/02 ,  G11C11/16 ,  H01L27/22 ,  H01L27/108 ,  H01L43/10

Abstract: A magnetic memory device includes a lower interlayer insulating layer on a substrate, and a plurality of magnetic tunnel junction patterns on the lower interlayer insulating layer and isolated from direct contact with each other in a direction extending parallel to a top surface of the substrate. The lower interlayer insulating layer includes an upper surface including a recessed surface and a top surface, the recessed surface at least partially defining an inner sidewall and a bottom surface of a recess region between adjacent magnetic tunnel junction patterns, such that the recessed surface at least partially defines the recess region. The inner sidewall is inclined at an acute angle with respect to the top surface of the substrate, and the bottom surface has a shape that is convex toward the top surface of the substrate, in direction extending perpendicular to the top surface of the substrate.

公开(公告)号：US10347819B2

公开(公告)日：2019-07-09

申请号：US15340330

申请日：2016-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongchul Park ,  Byoungjae Bae ,  Inho Kim ,  Shin Kwon ,  Eunsun Noh ,  Insun Park ,  Sangmin Lee

IPC: H01L27/22 ,  H01L43/08 ,  H01L21/033 ,  G11C11/16 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

Abstract: Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.

公开(公告)号：US10236442B2

公开(公告)日：2019-03-19

申请号：US15227334

申请日：2016-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehun Seo ,  Jong-Kyu Kim ,  Jung-Ik Oh ,  Inho Kim ,  Jongchul Park ,  Gwang-Hyun Baek ,  Hyun-woo Yang

IPC: H01L43/12 ,  H01L21/3213 ,  H01L21/02 ,  H01L27/22

Abstract: Provided herein are methods of fabricating a magnetic memory device including forming magnetic tunnel junction patterns on a substrate, forming an interlayered insulating layer on the substrate to cover the magnetic tunnel junction patterns, forming a conductive layer on the interlayered insulating layer, patterning the conductive layer to form interconnection patterns electrically connected to the magnetic tunnel junction patterns, and performing a cleaning process on the interconnection patterns. The cleaning process is performed using a gas mixture of a first gas and a second gas. The first gas contains a hydrogen element (H), and the second gas contains a source gas different from that of the first gas.