公开(公告)号：US20210272918A1

公开(公告)日：2021-09-02

申请号：US17325384

申请日：2021-05-20

申请人： Samsung Electronics Co., Ltd.

发明人： Ju-il Choi ,  Kwang-jin Moon ,  Ju-bin Seo ,  Dong-chan Lim ,  Atsushi Fujisaki ,  Ho-jin Lee

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065

摘要： A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.

公开(公告)号：US10763163B2

公开(公告)日：2020-09-01

申请号：US16242122

申请日：2019-01-08

申请人： Samsung Electronics Co., Ltd.

发明人： Su-jeong Park ,  Dong-chan Lim ,  Kwang-jin Moon ,  Ju-bin Seo ,  Ju-il Choi ,  Atsushi Fujisaki

IPC分类号： H01L23/48 ,  H01L21/768

摘要： An integrated circuit device includes a substrate, a landing pad on the substrate, and a through-via structure passing through the substrate and connected to the landing pad. The through-via structure may include a conductive plug, a first conductive barrier layer covering a sidewall and a lower surface of the conductive plug, and a second conductive barrier layer covering a sidewall of the first conductive barrier layer.

公开(公告)号：US09337125B2

公开(公告)日：2016-05-10

申请号：US13926616

申请日：2013-06-25

申请人： Samsung Electronics Co., Ltd.

发明人： Jae-hwa Park ,  Kwang-jin Moon ,  Byung-lyul Park

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/532 ,  H01L25/065 ,  H01L21/768 ,  H01L21/48 ,  H01L23/498 ,  H01L23/552

CPC分类号： H01L23/481 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/49827 ,  H01L23/53238 ,  H01L23/552 ,  H01L25/0657 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11009 ,  H01L2224/13 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： Integrated circuit devices are provided. The integrated circuit devices may include a via structure including a conductive plug, a conductive barrier layer spaced apart from the conductive plug, and an insulating layer between the conductive plug and conductive barrier layer. Related methods of forming integrated circuit devices are also provided.

摘要翻译： 提供集成电路设备。 集成电路器件可以包括通孔结构，其包括导电插塞，与导电插塞间隔开的导电阻挡层，以及在导电插塞和导电阻挡层之间的绝缘层。 还提供了形成集成电路器件的相关方法。

公开(公告)号：US20200075458A1

公开(公告)日：2020-03-05

申请号：US16366267

申请日：2019-03-27

申请人： Samsung Electronics Co., Ltd.

发明人： Dae-suk LEE ,  Hak-seung Lee ,  Dong-chan Lim ,  Tae-seong Kim ,  Kwang-jin Moon

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L21/768 ,  H01L23/532 ,  H01L23/31 ,  H01L23/522 ,  H01L25/18

摘要： Semiconductor chips and methods of manufacturing the same are provided. The semiconductor chip includes a substrate, an interlayer insulation layer including a bottom interlayer insulation layer on an upper surface of the substrate and a top interlayer insulation layer on the bottom interlayer insulation layer, an etch stop layer between the bottom interlayer insulation layer and the top interlayer insulation layer, a landing pad on the interlayer insulation layer, and a through via connected to the landing pad through the substrate, the interlayer insulation layer, and the etch stop layer. The etch stop layer is isolated from direct contact with the landing pad.

公开(公告)号：US20190259718A1

公开(公告)日：2019-08-22

申请号：US16398888

申请日：2019-04-30

申请人： Samsung Electronics Co., Ltd.

发明人： Ju-il Choi ,  Kwang-jin Moon ,  Ju-bin Seo ,  Dong-chan Lim ,  Atsushi Fujisaki ,  Ho-jin Lee

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/48

摘要： A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.

公开(公告)号：US20190027450A1

公开(公告)日：2019-01-24

申请号：US15870044

申请日：2018-01-12

申请人： Samsung Electronics Co., Ltd.

发明人： Ju-il Choi ,  Kwang-jin Moon ,  Ju-bin Seo ,  Dong-chan Lim ,  Atsushi Fujisaki ,  Ho-jin Lee

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065

摘要： A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.

公开(公告)号：US09941243B2

公开(公告)日：2018-04-10

申请号：US15413824

申请日：2017-01-24

申请人： Samsung Electronics Co., Ltd.

发明人： Tae-yeong Kim ,  Pil-kyu Kang ,  Seok-ho Kim ,  Kwang-jin Moon ,  Ho-jin Lee

IPC分类号： H01L23/52 ,  H01L23/00

CPC分类号： H01L24/94 ,  H01L24/02 ,  H01L24/05 ,  H01L24/29 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/02215 ,  H01L2224/04105 ,  H01L2224/05147 ,  H01L2224/29187 ,  H01L2224/29188 ,  H01L2224/8012 ,  H01L2224/8312 ,  H01L2224/83896 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/0537 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/0549 ,  H01L2924/365 ,  H01L2224/80

摘要： A wafer-to-wafer bonding structure includes a first wafer including a first conductive pad in a first insulating layer and a first barrier layer surrounding a lower surface and side surfaces of the first conductive pad, a second wafer including a second conductive pad in a second insulating layer and a second barrier layer surrounding a lower surface and side surfaces of the second conductive pad, the second insulating layer being bonded to the first insulating layer, and at least a portion of an upper surface of the second conductive pad being partially or entirely bonded to at least a portion of an upper surface of the first conductive pad, and a third barrier layer between portions of the first and second wafers where the first and second conductive pads are not bonded to each other.

公开(公告)号：US09831164B2

公开(公告)日：2017-11-28

申请号：US13756593

申请日：2013-02-01

申请人： Samsung Electronics Co., Ltd.

发明人： Kwang-jin Moon ,  Pil-kyu Kang ,  Dae-lok Bae ,  Gil-heyun Choi ,  Byung-lyul Park ,  Dong-chan Lim ,  Deok-young Jung

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L23/49827 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.

公开(公告)号：US11728297B2

公开(公告)日：2023-08-15

申请号：US17325384

申请日：2021-05-20

申请人： Samsung Electronics Co., Ltd.

发明人： Ju-il Choi ,  Kwang-jin Moon ,  Ju-bin Seo ,  Dong-chan Lim ,  Atsushi Fujisaki ,  Ho-jin Lee

IPC分类号： H01L21/768 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L24/05 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/481 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L23/3128 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/18 ,  H01L2224/0362 ,  H01L2224/03416 ,  H01L2224/03418 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03614 ,  H01L2224/03831 ,  H01L2224/03916 ,  H01L2224/0401 ,  H01L2224/0508 ,  H01L2224/05016 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05085 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/06181 ,  H01L2224/1312 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/8181 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/15311 ,  H01L2224/05171 ,  H01L2924/01029 ,  H01L2224/13111 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2224/13111 ,  H01L2924/01079 ,  H01L2224/13111 ,  H01L2924/01029 ,  H01L2224/13111 ,  H01L2924/01083 ,  H01L2224/13111 ,  H01L2924/0103 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/0103 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2224/13111 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2224/13111 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2224/13111 ,  H01L2924/01083 ,  H01L2924/0103 ,  H01L2224/13111 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13109 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13113 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13139 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13118 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13116 ,  H01L2924/013 ,  H01L2924/00014

摘要： A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.

公开(公告)号：US11488860B2

公开(公告)日：2022-11-01

申请号：US16938259

申请日：2020-07-24

申请人： Samsung Electronics Co., Ltd.

发明人： Su-jeong Park ,  Dong-chan Lim ,  Kwang-jin Moon ,  Ju-bin Seo ,  Ju-Il Choi ,  Atsushi Fujisaki

IPC分类号： H01L23/48 ,  H01L21/768

摘要： An integrated circuit device includes a substrate, a landing pad on the substrate, and a through-via structure passing through the substrate and connected to the landing pad. The through-via structure may include a conductive plug, a first conductive barrier layer covering a sidewall and a lower surface of the conductive plug, and a second conductive barrier layer covering a sidewall of the first conductive barrier layer.