公开(公告)号：US20190325952A1

公开(公告)日：2019-10-24

申请号：US16503169

申请日：2019-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-WON PARK ,  DONGKYO SHIM ,  KITAE PARK ,  SANG-WON SHIM

IPC: G11C11/56 ,  G11C29/02 ,  G11C16/08 ,  G11C16/26 ,  G11C16/04 ,  G11C16/34 ,  G11C8/08

Abstract: A nonvolatile memory device includes a voltage generator that sequentially provides a first setup voltage and second setup voltage to a word line of a memory cell array, and control logic including a time control unit that determines a word line setup time for the word line in relation to the second setup voltage based on a difference between the first and second setup voltages.

公开(公告)号：US20150078095A1

公开(公告)日：2015-03-19

申请号：US14322335

申请日：2014-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-WON PARK ,  DONGKYO SHIM ,  KITAE PARK ,  SANG-WON SHIM

IPC: G11C16/26

CPC classification number: G11C11/5642 ,  G11C8/08 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  G11C16/3459 ,  G11C29/021 ,  G11C29/028

Abstract: A nonvolatile memory device includes a voltage generator that sequentially provides a first setup voltage and second setup voltage to a word line of a memory cell array, and control logic including a time control unit that determines a word line setup time for the word line in relation to the second setup voltage based on a difference between the first and second setup voltages.

Abstract translation: 非易失性存储器件包括：电压发生器，其向存储单元阵列的字线依次提供第一设定电压和第二设定电压;以及控制逻辑，包括时间控制单元，所述时间控制单元确定所述字线的字线建立时间 基于所述第一和第二设定电压之间的差，将所述第二设置电压提供给所述第二设置电压。

公开(公告)号：US20180268903A1

公开(公告)日：2018-09-20

申请号：US15978230

申请日：2018-05-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-WAN NAM ,  KITAE PARK

IPC: G11C16/04 ,  G11C16/10 ,  G11C16/08 ,  G11C16/34 ,  G11C16/16

CPC classification number: G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/3427

Abstract: A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line.

公开(公告)号：US20170358361A1

公开(公告)日：2017-12-14

申请号：US15687564

申请日：2017-08-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUN-WOOK PARK ,  KITAE PARK ,  JAEYONG JEONG

IPC: G11C16/14 ,  G11C16/26 ,  G11C16/08 ,  G11C16/04 ,  G11C16/34 ,  G11C11/56

CPC classification number: G11C16/14 ,  G11C11/56 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  G11C16/3418 ,  G11C16/3445

Abstract: An method of operating a memory system including a plurality of memory cells includes changing an operation mode at least some of the memory cells which operate based on a first operation mode to operate based on a second operation mode; and performing a change erase operation on the memory cells for which an operation mode is changed on the basis of a change erase condition when the operation mode is changed. When memory cells operate in the first operation mode, a normal erase operation is performed based on a first erase condition, and when memory cells operate in the second operation mode, a normal erase operation is performed based on a second erase condition. The change erase condition is different from at least one of the first and second erase conditions.

公开(公告)号：US20160343419A1

公开(公告)日：2016-11-24

申请号：US15225017

申请日：2016-08-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-WON PARK ,  KITAE PARK ,  SANG-WON SHIM

IPC: G11C8/08 ,  G11C16/08 ,  G11C8/10 ,  G11C16/10 ,  G11C5/02 ,  G11C16/04 ,  G11C16/30

CPC classification number: G11C8/08 ,  G11C5/02 ,  G11C7/04 ,  G11C8/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/30 ,  G11C16/32

Abstract: A word line driving method is for a nonvolatile memory device including a plurality of memory blocks having a plurality of strings which is formed in a direction perpendicular to a substrate and connected between bit lines and a common source line. The method includes applying an offset pulse to a word line for a predetermined time to shorten a word line setting time, and applying a target pulse having a level which is higher or lower than a level of the offset pulse to the word line after the predetermined time.

公开(公告)号：US20160012898A1

公开(公告)日：2016-01-14

申请号：US14858120

申请日：2015-09-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Won SHIM ,  Sang-Wan NAM ,  KITAE PARK

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/34 ,  G11C16/04

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3427 ,  G11C16/3459

Abstract: A program method of a nonvolatile memory device is provided, which includes programming a memory cell in one string selected from a plurality of vertical strings; determining whether a mode of operation of the nonvolatile memory device is a pre-pulse mode; when the mode of operation is determined to be the pre-pulse mode, applying a pre-pulse having a predetermined level to a string selection line connected with a gate of a string selection transistor of at least one unselected vertical string of the plurality of vertical strings for a particular time period; and performing a verification operation on the programmed memory cell.

Abstract translation: 提供了一种非易失性存储器件的编程方法，其包括以多个垂直字符串中选择的一个串中的存储器单元进行编程; 确定所述非易失存储器件的工作模式是否是预脉冲模式; 当操作模式被确定为预脉冲模式时，将具有预定电平的预脉冲施加到与多个垂直线中的至少一个未选择垂直弦的串选择晶体管的栅极连接的串选择线 特定时间段的字符串; 以及对所编程的存储单元执行验证操作。

公开(公告)号：US20150378885A1

公开(公告)日：2015-12-31

申请号：US14668015

申请日：2015-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUNJIN KIM ,  KITAE PARK ,  SEONKYOO LEE ,  JEONGDON IHM ,  YOUNGJIN JEON

IPC: G06F12/02 ,  G11C16/10 ,  G06F13/16 ,  G11C7/10

CPC classification number: G06F12/0246 ,  G06F13/1673 ,  G06F2212/7201 ,  G06F2212/7203 ,  G11C7/1072 ,  G11C16/102

Abstract: A solid state drive includes a nonvolatile memory, a random access memory, and a memory controller. The nonvolatile memory contains a plurality of nonvolatile memories chips and a buffer chip. The memory controller is formed of an internal bus, a host interface, a memory interface, a buffer control circuit, and a processor.

Abstract translation: 固态驱动器包括非易失性存储器，随机存取存储器和存储器控制器。 非易失性存储器包含多个非易失性存储器芯片和缓冲芯片。 存储器控制器由内部总线，主机接口，存储器接口，缓冲器控制电路和处理器构成。

公开(公告)号：US20150179272A1

公开(公告)日：2015-06-25

申请号：US14458567

申请日：2014-08-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DOOHYUN KIM ,  HYUN JUN YOON ,  DONGHUN KWAK ,  KITAE PARK ,  CHANGYEON YU

IPC: G11C16/26

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3495 ,  G11C29/52 ,  G11C29/56

Abstract: A nonvolatile memory device may include a memory cell array which is arranged in rows and columns and has multi-level memory cells; a voltage generator providing a plurality of read voltages to a selected row of the memory cell array; and control logic performing a plurality of page read operations using the read voltages. A first read voltage and a second read voltage among the plurality of read voltages are each associated with a higher probability of occurrence of a bit read error than at least one other read voltage among the plurality of read voltages. The control logic uses the first read voltage and the second read voltage in different page read operations than each other.

Abstract translation: 非易失性存储器件可以包括以行和列布置并具有多级存储单元的存储单元阵列; 电压发生器，向存储单元阵列的选定行提供多个读取电压; 以及控制逻辑，使用读取的电压执行多个页面读取操作。 多个读取电压之间的第一读取电压和第二读取电压各自与多个读取电压中的至少一个其他读取电压的比特读取错误的发生概率相关。 控制逻辑在彼此不同的页读操作中使用第一读电压和第二读电压。

公开(公告)号：US20150117100A1

公开(公告)日：2015-04-30

申请号：US14336343

申请日：2014-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUN-WOOK PARK ,  JUNG-SOO KIM ,  JAEYONG JEONG ,  KITAE PARK ,  YOUNGSUN SONG

IPC: G11C16/10

CPC classification number: G11C16/225 ,  G11C16/0483 ,  G11C16/10

Abstract: A method of programming a storage device comprises determining whether at least one open page exists in a memory block of a nonvolatile memory device, and as a consequence of determining that at least one open page exists in the memory block, closing the at least one open page through a dummy pattern program operation, and thereafter performing a continuous writing operation on the memory block.

Abstract translation: 一种对存储设备进行编程的方法包括确定至少一个开放页面是否存在于非易失性存储器件的存储器块中，并且作为确定存储器块中存在至少一个打开页面的结果，关闭至少一个打开的 通过虚拟图案编程操作，然后对存储块进行连续写入操作。

公开(公告)号：US20140153339A1

公开(公告)日：2014-06-05

申请号：US14177457

申请日：2014-02-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MINSEOK KIM ,  KITAE PARK

IPC: G11C16/26

CPC classification number: G11C16/26 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/06

Abstract: A non-volatile memory device which includes a sensing mode selector configured to select a sensing mode according to environment information. A page buffer senses a data state of a memory cell in one of a plurality of sensing methods, depending upon the selected sensing mode.

Abstract translation: 一种非易失性存储装置，包括被配置为根据环境信息选择感测模式的感测模式选择器。 取决于所选择的感测模式，页面缓冲器以多种感测方法中的一种感测存储器单元的数据状态。