公开(公告)号：US20150117100A1

公开(公告)日：2015-04-30

申请号：US14336343

申请日：2014-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUN-WOOK PARK ,  JUNG-SOO KIM ,  JAEYONG JEONG ,  KITAE PARK ,  YOUNGSUN SONG

IPC: G11C16/10

CPC classification number: G11C16/225 ,  G11C16/0483 ,  G11C16/10

Abstract: A method of programming a storage device comprises determining whether at least one open page exists in a memory block of a nonvolatile memory device, and as a consequence of determining that at least one open page exists in the memory block, closing the at least one open page through a dummy pattern program operation, and thereafter performing a continuous writing operation on the memory block.

Abstract translation: 一种对存储设备进行编程的方法包括确定至少一个开放页面是否存在于非易失性存储器件的存储器块中，并且作为确定存储器块中存在至少一个打开页面的结果，关闭至少一个打开的 通过虚拟图案编程操作，然后对存储块进行连续写入操作。

公开(公告)号：US20150348633A1

公开(公告)日：2015-12-03

申请号：US14747786

申请日：2015-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNGSUN SONG ,  BOGEUN KIM ,  OHSUK KWON ,  KITAE PARK ,  SEUNG-HWAN SHIN ,  SANGYONG YOON ,  MOOSUNG KIM ,  HYUNJUN YOON

IPC: G11C16/12 ,  G11C16/34

CPC classification number: G11C16/12 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3459

Abstract: A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation.

Abstract translation: 非易失性存储器件包括存储单元阵列，输出验证读取结果的页面缓冲器单元，产生参考电流信号的参考电流产生单元，根据验证读取结果输出电流的页面缓冲器解码单元。 非易失性存储装置还包括对电流进行计数的模拟比特计数单元，计算计数结果的累积和的数字加法单元，根据计算结果输出通过信号或失败信号的通过/失败检查单元， 以及控制程序操作的控制单元。

公开(公告)号：US20140376312A1

公开(公告)日：2014-12-25

申请号：US14316023

申请日：2014-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNGSUN SONG ,  BOGEUN KIM ,  OHSUK KWON ,  KITAE PARK ,  SEUNG-HWAN SHIN ,  SANGYONG YOON

IPC: G11C16/10 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/08 ,  G11C16/34 ,  G11C16/3459

Abstract: A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation.

Abstract translation: 非易失性存储器件包括存储单元阵列，输出验证读取结果的页面缓冲器单元，产生参考电流信号的参考电流产生单元，根据验证读取结果输出电流的页面缓冲器解码单元。 非易失性存储装置还包括对电流进行计数的模拟比特计数单元，计算计数结果的累积和的数字加法单元，根据计算结果输出通过信号或失败信号的通过/失败检查单元， 以及控制程序操作的控制单元。

公开(公告)号：US20210181984A1

公开(公告)日：2021-06-17

申请号：US16888671

申请日：2020-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNGSUN SONG

IPC: G06F3/06 ,  G06F11/10 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26

Abstract: In a method of writing data in a memory device, a plurality of duplicated bit rows is generated by performing a first duplication operation in which a plurality of bits included in write data are copied by units of bits. A plurality of duplicated bit groups is generated by performing a second duplication operation in which the plurality of duplicated bit rows is copied by units of rows. The plurality of duplicated bit groups is stored into a plurality of memory regions included in the memory device, respectively. Each of the plurality of memory regions is a region that is simultaneously sensed during a data read operation.

公开(公告)号：US20200210369A1

公开(公告)日：2020-07-02

申请号：US16549968

申请日：2019-08-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNGSUN SONG

IPC: G06F15/78 ,  G11C11/4094 ,  G06F12/02 ,  G06F9/30 ,  G06F17/16 ,  G06N3/04

Abstract: In a processing in memory (PIM) method using a memory device, m*n multiplicand arrangement bits are stored in m*n memory cells by copying and arranging m multiplicand bits of a multiplicand value and m*n multiplier arrangement bits are stored in m*n read-write unit circuits corresponding to the m*n memory cells by copying and arranging n multiplier bits of a multiplier value. The m*n multiplicand arrangement bits stored in the m*n memory cells are selectively read based on the m*n multiplier arrangement bits stored in the m*n read-write unit circuits, and m*n multiplication bits are stored in the m*n read-write unit circuits based on the selectively read m*n multiplicand arrangement bits. A multiplication value of the multiplicand value and the multiplier value is determined based on the m*n multiplication bits stored in the m*n read-write unit circuits.