公开(公告)号：US20190189804A1

公开(公告)日：2019-06-20

申请号：US16044691

申请日：2018-07-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Dong Hyun KIM ,  Byoung-Gi KIM ,  Yun Suk NAM ,  Yeong Min JEON ,  Sung Chul PARK ,  Dae Won HA

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/762 ,  H01L23/532 ,  H01L29/06

CPC classification number: H01L29/7855 ,  H01L21/762 ,  H01L21/823821 ,  H01L21/823864 ,  H01L23/5329 ,  H01L29/0642 ,  H01L29/6681

Abstract: A semiconductor device includes first and second fin patterns on a substrate and extending apart from each other, a field insulating film on the substrate and surrounding parts of the first and second fin patterns, a first gate structure on the first fin pattern and intersecting the first fin pattern, a second gate structure on the second fin pattern and intersecting the second fin pattern, and a separating structure protruding from a top surface of the field insulating film and separating the first and second gate structures, the field insulating film and the separating structure including a same insulating material.

公开(公告)号：US20170263722A1

公开(公告)日：2017-09-14

申请号：US15408815

申请日：2017-01-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Gi Gwan PARK ,  Sug Hyun SUNG ,  Myung Yoon UM ,  Dong Suk SHIN

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/775 ,  H01L29/7848

Abstract: A semiconductor device includes a first gate electrode on a substrate, a first trench on a first side of the first gate electrode, a second trench on a second side of the first gate electrode, a depth of the second trench being greater than a depth of the first trench, a first source/drain filling the first trench, and a second source/drain filling the second trench, a height of an upper surface of the second source/drain being greater than a height of the first source/drain.

公开(公告)号：US20170092728A1

公开(公告)日：2017-03-30

申请号：US15272456

申请日：2016-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Jung Gun YOU ,  Gi Gwan PARK ,  Dong Suk SHIN ,  Jin Wook KIM

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/45 ,  H01L27/088

CPC classification number: H01L29/41791 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/456 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes a substrate having first and second regions, a first fin-type pattern and a second fin-type pattern formed in the first region and extending in a first direction, and a third fin-type pattern and a fourth fin-type pattern formed in the second region and extending in a third direction. A first source/drain is formed on the first fin-type pattern and a second source/drain region is formed on the second fin-type pattern. Each of first and second source/drains have a cross section defining a same convex polygonal shape. A third source/drain is formed on the third fin-type pattern and a fourth source/drain region is formed on the fourth fin-type pattern. Cross-sections of the third and fourth source/drains define different convex polygonal shapes from one another.

公开(公告)号：US20200243684A1

公开(公告)日：2020-07-30

申请号：US16848145

申请日：2020-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Dong Hyun KIM ,  Byoung-Gi KIM ,  Yun Suk NAM ,  Yeong Min JEON ,  Sung Chul PARK ,  Dae Won HA

IPC: H01L29/78 ,  H01L27/088 ,  H01L21/8238 ,  H01L21/8234 ,  H01L21/762 ,  H01L29/66 ,  H01L23/532 ,  H01L29/06 ,  H01L29/165

Abstract: A semiconductor device includes first and second fin patterns on a substrate and extending apart from each other, a field insulating film on the substrate and surrounding parts of the first and second fin patterns, a first gate structure on the first fin pattern and intersecting the first fin pattern, a second gate structure on the second fin pattern and intersecting the second fin pattern, and a separating structure protruding from a top surface of the field insulating film and separating the first and second gate structures, the field insulating film and the separating structure including a same insulating material.

公开(公告)号：US20170162576A1

公开(公告)日：2017-06-08

申请号：US15368723

申请日：2016-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gi Gwan PARK ,  Jung Gun YOU ,  Dong Suk SHIN ,  Hyun Yul CHOI

IPC: H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/45 ,  H01L29/167 ,  H01L29/165 ,  H01L29/06 ,  H01L29/78 ,  H01L27/02

CPC classification number: H01L27/0924 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0207 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/41766 ,  H01L29/41783 ,  H01L29/41791 ,  H01L29/456 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising first and second regions, in the first region, first and second gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a first distance, in the second region, third and fourth gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a second distance which is greater than the first distance, in the first region, a first recess formed on the substrate between the first and second gate electrodes, in the second region, a second recess formed on the substrate between the third and fourth gate electrodes, a first epitaxial source/drain filling the first recess and a second epitaxial source/drain filling the second recess, wherein an uppermost portion of an upper surface of the first epitaxial source/drain is higher than an uppermost portion of an upper surface of the second epitaxial source/drain.

公开(公告)号：US20230282640A1

公开(公告)日：2023-09-07

申请号：US18079209

申请日：2022-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG ,  Dong Woo HAN

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L27/088 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775

Abstract: A semiconductor device comprising a first active pattern including a first lower pattern, and a plurality of first sheet patterns, a plurality of first gate structures on the first lower pattern, a second active pattern including a second lower pattern and a plurality of second sheet patterns, a plurality of second gate structures on the second lower pattern, a first source/drain recess between adjacent first gate structures, a second source/drain recess between adjacent second gate structures, first and second source/drain patterns in the first and second source/drain recesses, respectively, wherein a depth from an upper surface of the first lower pattern to a lowermost part of the first source/drain pattern is smaller than a depth from an upper surface of the second lower pattern to a lowermost part of the second source/drain pattern, and the first and second source/drain patterns include impurities of same conductive type.

公开(公告)号：US20210118746A1

公开(公告)日：2021-04-22

申请号：US17134710

申请日：2020-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan PARK ,  Jung Gun YOU ,  Ki Il KIM ,  Sug Hyun SUNG ,  Myung Yoon UM

IPC: H01L21/8238 ,  H01L21/762 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8234 ,  H01L29/78

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20190081180A1

公开(公告)日：2019-03-14

申请号：US15944175

申请日：2018-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung IL PARK ,  Jung Gun YOU ,  Dong Hun LEE ,  Yun IL LEE

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423 ,  H01L29/49

Abstract: A semiconductor device includes a substrate; a vertical channel structure including a pair of active fins extended in a first direction, perpendicular to an upper surface of the substrate, and an insulating portion interposed between the pair of active fins; an upper source/drain disposed on the vertical channel structure; a lower source/drain disposed below the vertical channel structure and on the substrate; a gate electrode disposed between the upper source/drain and the lower source/drain and surrounding the vertical channel structure; and a gate dielectric layer disposed between the gate electrode and the vertical channel structure. An interval between the gate electrode and the upper source/drain may be smaller than an interval between the gate electrode and the lower source/drain in the first direction.

公开(公告)号：US20240237325A9

公开(公告)日：2024-07-11

申请号：US18212817

申请日：2023-06-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG

IPC: H10B10/00 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775

CPC classification number: H10B10/125 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775 ,  H10B10/18 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate including first and second regions; a first active pattern including a first lower pattern and first sheet patterns; a second active pattern including a second lower pattern, a height of the second lower pattern being identical to a height of the first lower pattern, and second sheet patterns; a first gate structure including a first gate insulating film and a first gate electrode; a second gate structure including a second gate insulating film, and a second gate electrode, a width of the second gate electrode being greater than a width of the first gate electrode; a first source/drain pattern on the first lower pattern and connected to the first sheet patterns; and a second source/drain pattern on the second lower pattern and connected to the second sheet patterns, wherein a number of first sheet patterns is smaller than a number of second sheet patterns.

公开(公告)号：US20240138137A1

公开(公告)日：2024-04-25

申请号：US18212817

申请日：2023-06-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG

IPC: H10B10/00 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775

CPC classification number: H10B10/125 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775 ,  H10B10/18 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate including first and second regions; a first active pattern including a first lower pattern and first sheet patterns; a second active pattern including a second lower pattern, a height of the second lower pattern being identical to a height of the first lower pattern, and second sheet patterns; a first gate structure including a first gate insulating film and a first gate electrode; a second gate structure including a second gate insulating film, and a second gate electrode, a width of the second gate electrode being greater than a width of the first gate electrode; a first source/drain pattern on the first lower pattern and connected to the first sheet patterns; and a second source/drain pattern on the second lower pattern and connected to the second sheet patterns, wherein a number of first sheet patterns is smaller than a number of second sheet patterns.