公开(公告)号：US20170301773A1

公开(公告)日：2017-10-19

申请号：US15632735

申请日：2017-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjine PARK ,  Jae-Jik BAEK ,  Myunggeun SONG ,  Boun YOON ,  Sukhun CHOI ,  Jeongnam HAN

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L21/02 ,  H01L29/08 ,  H01L21/768 ,  H01L21/311 ,  H01L21/3105

CPC classification number: H01L29/66545 ,  H01L21/0228 ,  H01L21/31051 ,  H01L21/31111 ,  H01L21/76897 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4983 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Provided is a semiconductor device including a substrate with an active pattern, a gate electrode crossing the active pattern, and a gate capping pattern on the gate electrode. The gate capping pattern may have a width larger than that of the gate electrode, and the gate capping pattern may include extended portions extending toward the substrate and at least partially covering both sidewalls of the gate electrode.

公开(公告)号：US20150162197A1

公开(公告)日：2015-06-11

申请号：US14525467

申请日：2014-10-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Jik BAEK ,  Sang-Jine Park ,  Bo-Un Yoon ,  Young-Sang Youn ,  Ji-Min Jeong ,  Ji-Hoon Cha

IPC: H01L21/266 ,  H01L21/033 ,  H01L21/8234

CPC classification number: H01L21/266 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/66575

Abstract: A first protective layer, a mask layer, a second protective layer and a photoresist layer are sequentially formed on a substrate. A photoresist pattern is formed by partially removing the photoresist layer. An ion implantation mask is formed by sequentially etching the second protective layer, the mask layer and the first protective layer using the photoresist pattern. The ion implantation mask exposes the substrate. Impurities are implanted in an upper portion of the substrate exposed by the ion implantation mask.

Abstract translation: 在基板上依次形成第一保护层，掩模层，第二保护层和光致抗蚀剂层。 通过部分去除光致抗蚀剂层形成光致抗蚀剂图案。 通过使用光致抗蚀剂图案依次蚀刻第二保护层，掩模层和第一保护层来形成离子注入掩模。 离子注入掩模暴露衬底。 将杂质植入由离子注入掩模暴露的衬底的上部。

公开(公告)号：US20170084719A1

公开(公告)日：2017-03-23

申请号：US15229930

申请日：2016-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hoyoung KIM ,  SANG WON BAE ,  Jae-Jik BAEK ,  Wonsang CHOI

IPC: H01L29/66 ,  C09K13/00 ,  H01L21/3213 ,  H01L21/28 ,  H01L21/3205

CPC classification number: H01L29/66545 ,  C09K13/00 ,  H01L21/28017 ,  H01L21/28255 ,  H01L21/32055 ,  H01L21/32134 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/7848

Abstract: The present disclosure relates to an etchant, a method of making an etchant, an etching method and a method of fabricating a semiconductor device using the same. The etching method includes supplying an etchant on an etch-target layer to etch the etch-target layer in a wet etch manner. The etchant contains a basic compound and a sugar alcohol, and the basic compound contains ammonium hydroxide or tetraalkyl ammonium hydroxide. In the etchant, the sugar alcohol has 0.1 to 10 parts by weight for every 100 parts by weight of the basic compound.

公开(公告)号：US20140080296A1

公开(公告)日：2014-03-20

申请号：US13944087

申请日：2013-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jik BAEK ,  Ji-Hoon CHA ,  Bo-Un YOON ,  Kwang-Wook LEE ,  Jeong-Nam HAN

IPC: H01L21/306

CPC classification number: H01L21/30604 ,  H01L21/30608 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/66628 ,  H01L29/7833 ,  H01L29/7848

Abstract: A method of fabricating a semiconductor device includes forming a gate pattern on a substrate, and etching sides of the gate pattern using a first wet-etching process to form a first recess. The first wet-etching process includes using an etchant containing a first chemical substance including a hydroxyl functional group (—OH) and a second chemical substance capable of oxidizing the substrate. The concentration of the second chemical substance is 1.5 times or less the concentration of the first chemical substance.

Abstract translation: 制造半导体器件的方法包括在衬底上形成栅极图案，并且使用第一湿蚀刻工艺蚀刻栅极图案的侧面以形成第一凹部。 第一湿蚀刻工艺包括使用含有包含羟基官能团（-OH）的第一化学物质和能够氧化底物的第二化学物质的蚀刻剂。 第二化学物质的浓度为第一化学物质浓度的1.5倍以下。

公开(公告)号：US20160027901A1

公开(公告)日：2016-01-28

申请号：US14697829

申请日：2015-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjine PARK ,  Jae-Jik BAEK ,  Myunggeun SONG ,  Boun YOON ,  Sukhun CHOI ,  Jeongnam HAN

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/49

CPC classification number: H01L29/66545 ,  H01L21/0228 ,  H01L21/31051 ,  H01L21/31111 ,  H01L21/76897 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4983 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Provided is a semiconductor device including a substrate with an active pattern, a gate electrode crossing the active pattern, and a gate capping pattern on the gate electrode. The gate capping pattern may have a width larger than that of the gate electrode, and the gate capping pattern may include extended portions extending toward the substrate and at least partially covering both sidewalls of the gate electrode.

Abstract translation: 提供了一种半导体器件，其包括具有活性图案的衬底，与有源图案交叉的栅极电极和栅电极上的栅极覆盖图案。 栅极封盖图案可以具有大于栅电极的宽度的宽度，并且栅极封盖图案可以包括朝向衬底延伸的延伸部分，并且至少部分地覆盖栅电极的两个侧壁。