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    Semiconductor device and method of manufacturing the same
    4.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US10818601B1

    公开(公告)日：2020-10-27

    申请号：US16911852

    申请日：2020-06-25

    申请人： Renesas Electronics Corporation

    发明人： Yoshinori Deguchi ,  Akinobu Watanabe

    IPC分类号： H01L23/535 ,  H01L23/522 ,  H01L21/768 ,  H01L21/66 ,  H01L23/538 ,  H01L23/00 ,  H01L23/58 ,  H01L21/3205

    摘要： A semiconductor device includes a semiconductor substrate SB and a wiring structure formed on a main surface of the semiconductor substrate SB. The uppermost first wiring layer among a plurality of wiring layers included in the wiring structure includes a pad PD, and the pad PD has a first region for bonding a copper wire and a second region for bringing a probe into contact with the pad. A second wiring layer that is lower by one layer than the first wiring layer among the plurality of wiring layers included in the wiring structure includes a wiring line M6 arranged immediately below the pad PD, the wiring line M6 is arranged immediately below a region other than the first region of the pad PD, and no conductor pattern in the same layer as a layer of the wiring line M6 belong is formed immediately below the first region of the pad PD.

    Method for manufacturing semiconductor device
    5.
    发明授权
    Method for manufacturing semiconductor device 有权

    公开(公告)号：US10141295B2

    公开(公告)日：2018-11-27

    申请号：US15730977

    申请日：2017-10-12

    申请人： Renesas Electronics Corporation

    发明人： Bunji Yasumura ,  Yoshinori Deguchi ,  Fumikazu Takei ,  Akio Hasebe ,  Naohiro Makihira ,  Mitsuyuki Kubo

    IPC分类号： H01L21/30 ,  H01L25/00 ,  H01L21/683 ,  H01L23/00 ,  H01L21/66 ,  H01L23/544 ,  H01L25/065 ,  H01L25/18

    摘要： To improve the assemblability of a semiconductor device.When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed based on a result of the recognition, and the above-described memory chip is mounted over the logic chip. At this time, the shape of the recognition range is different from any portion of an array shape of the bumps, as a result, the recognition mark in the shape of the recognition range can be reliably recognized, and alignment of the bumps of the logic chip and the projection electrodes of the above-described memory chip is performed with high accuracy.

    Method of manufacturing semiconductor device
    8.
    发明授权
    Method of manufacturing semiconductor device 有权

    公开(公告)号：US11456264B2

    公开(公告)日：2022-09-27

    申请号：US17148923

    申请日：2021-01-14

    申请人： RENESAS ELECTRONICS CORPORATION

    发明人： Yoshiaki Sato ,  Mitsunobu Wansawa ,  Akira Matsumoto ,  Yoshinori Deguchi ,  Kentaro Saito

    IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  G11C16/04 ,  H01L21/66

    摘要： In a method of manufacturing a semiconductor device according to one embodiment, after a semiconductor wafer including a non-volatile memory, a bonding pad and an insulating film comprised of an organic material is provided, a probe needle is contacted to a surface of the bonding pad located in a second region, and a data is written to the non-volatile memory. Here, the insulating film is formed by performing a first heat treatment to the organic material. Also, after a second heat treatment is performed to the semiconductor wafer, and the non-volatile memory to which the data is written is checked, a barrier layer and a first solder material are formed on the surface of the bonding pad located in a first region by using an electroplating method. Further, a bump electrode is formed in the first region by performing a third heat treatment to the first solder material.