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    BODY-CONTACT METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR DEVICE
    2.
    发明申请
    BODY-CONTACT METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR DEVICE 有权
    身体接触金属氧化物半导体场效应晶体管器件

    公开(公告)号：US20150123206A1

    公开(公告)日：2015-05-07

    申请号：US14450445

    申请日：2014-08-04

    Applicant: MediaTek Inc.

    Inventor： Cheng-Chou HUNG ,  Tung-Hsing LEE ,  Bernard Mark TENBROEK ,  Rong-Tang CHEN

    IPC: H01L29/78 ,  H01L29/49 ,  H01L29/10 ,  H01L29/06 ,  H01L29/423

    CPC classification number: H01L29/783 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/4238 ,  H01L29/4975 ,  H01L29/78615 ,  H01L29/78654 ,  H01L29/78657

    Abstract: The invention provides a body-contact metal-oxide-semiconductor field effect transistor (MOSFET) device. The body-contact MOSFET device includes a substrate. An active region is disposed on the substrate. A gate strip is extended along a first direction disposed on a first portion of the active region. A source doped region and a drain doped region are disposed on a second portion and a third portion of the active region, adjacent to opposite sides of the gate strip. The opposite sides of the gate strip are extended along the first direction. A body-contact doped region is disposed on a fourth portion of the active region. The body-contact doped region is separated from the gate strip by a fifth portion of the active region. The fifth portion is not covered by any silicide features.

    Abstract translation: 本发明提供一种体接触金属氧化物半导体场效应晶体管（MOSFET）器件。 体接触MOSFET器件包括衬底。 有源区设置在基板上。 栅极条沿着设置在有源区域的第一部分上的第一方向延伸。 源极掺杂区域和漏极掺杂区域设置在与栅极条的相对侧相邻的有源区域的第二部分和第三部分上。 栅极条的相对侧沿第一方向延伸。 体接触掺杂区域设置在有源区域的第四部分上。 体接触掺杂区域与有源区域的第五部分与栅极条分离。 第五部分不被任何硅化物特征覆盖。

    SEMICONDUCTOR PACKAGE ASSEMBLY WITH THROUGH SILICON VIA INTERCONNECT
    7.
    发明申请
    SEMICONDUCTOR PACKAGE ASSEMBLY WITH THROUGH SILICON VIA INTERCONNECT 有权
    半导体封装通过互连的硅组件组装

    公开(公告)号：US20160181201A1

    公开(公告)日：2016-06-23

    申请号：US14963451

    申请日：2015-12-09

    Applicant: MediaTek Inc.

    Inventor： Ming-Tzong YANG ,  Cheng-Chou HUNG ,  Wei-Che HUANG ,  Yu-Hua HUANG ,  Tzu-Hung LIN ,  Kuei-Ti CHAN ,  Ruey-Beei WU ,  Kai-Bin WU

    IPC: H01L23/538 ,  H01L25/065

    CPC classification number: H01L23/5384 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5386 ,  H01L24/14 ,  H01L25/0657 ,  H01L2224/16146 ,  H01L2225/06541 ,  H01L2225/06544

    Abstract: The invention provides a semiconductor package assembly with a TSV interconnect. The semiconductor package assembly includes a first semiconductor die mounted on a base. The first semiconductor die includes a semiconductor substrate. A first array of TSV interconnects and a second array of TSV interconnects are formed through the semiconductor substrate, wherein the first array and second array of TSV interconnects are separated by an interval region. A first ground TSV interconnect is disposed within the interval region. A second semiconductor die is mounted on the first semiconductor die, having a ground pad thereon. The first ground TSV interconnect of the first semiconductor die has a first terminal coupled to the ground pad of the second semiconductor die and a second terminal coupled to an interconnection structure disposed on a front side of the semiconductor substrate.

    Abstract translation: 本发明提供一种具有TSV互连的半导体封装组件。 半导体封装组件包括安装在基座上的第一半导体管芯。 第一半导体管芯包括半导体衬底。 通过半导体衬底形成TSV互连的第一阵列和TSV互连的第二阵列，其中TSV互连的第一阵列和第二阵列被间隔区隔开。 第一接地TSV互连设置在间隔区域内。 第二半导体管芯安装在第一半导体管芯上，其上具有接地焊盘。 第一半导体管芯的第一接地TSV互连具有耦合到第二半导体管芯的接地焊盘的第一端子和耦合到布置在半导体衬底的前侧上的互连结构的第二端子。

    RADIO-FREQUENCY DEVICE PACKAGE AND METHOD FOR FABRICATING THE SAME
    9.
    发明申请
    RADIO-FREQUENCY DEVICE PACKAGE AND METHOD FOR FABRICATING THE SAME 有权
    无线电频率设备包及其制造方法

    公开(公告)号：US20150162242A1

    公开(公告)日：2015-06-11

    申请号：US14621703

    申请日：2015-02-13

    Applicant: MediaTek Inc.

    Inventor： Ming-Tzong YANG ,  Cheng-Chou HUNG ,  Tung-Hsing LEE ,  Wei-Che HUANG ,  Yu-Hua HUANG

    IPC: H01L21/768 ,  H01L21/268 ,  H01L21/306 ,  H01L23/00

    CPC classification number: H01L21/76898 ,  H01L21/02107 ,  H01L21/268 ,  H01L21/30625 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/66 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L31/18 ,  H01L2223/6616 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/11 ,  H01L2924/12042 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: A method for fabricating a electronic device package provides a electronic device chip, wherein the electronic device chip includes a semiconductor substrate having a front side and a back side, wherein the semiconductor substrate has a first thickness, an electronic component disposed on the front side of the semiconductor substrate, and an interconnect structure disposed on the electronic component. The method further performs a thinning process to remove a portion of the semiconductor substrate from the back side thereof The method then removes a portion of the thinned semiconductor substrate and a portion of a dielectric layer of the interconnect structure from a back side of the thinned semiconductor substrate until a first metal layer pattern of the interconnect structure is exposed, thereby forming a through hole. Finally, the method forms a TSV structure in the through hole, and mounts the electronic device chip on a base.

    Abstract translation: 一种制造电子器件封装的方法，提供了一种电子器件芯片，其中电子器件芯片包括具有正面和背面的半导体衬底，其中半导体衬底具有第一厚度，电子部件设置在第一厚度的前侧 半导体衬底和布置在电子部件上的互连结构。 该方法还进行薄膜化处理以从背面去除半导体衬底的一部分。然后，该方法从薄化半导体的背面去除一部分减薄的半导体衬底和互连结构的介电层的一部分 衬底，直到互连结构的第一金属层图案被暴露，从而形成通孔。 最后，该方法在通孔中形成TSV结构，并将电子设备芯片安装在基座上。

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