公开(公告)号：US20160056360A1

公开(公告)日：2016-02-25

申请号：US14372037

申请日：2014-04-22

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Byung Jin Cho ,  Sun Jin Kim ,  Ju Hyung We

IPC: H01L35/04 ,  H01L35/34 ,  H01L35/16

CPC classification number: H01L35/04 ,  H01L35/16 ,  H01L35/32 ,  H01L35/34

Abstract: The present invention relates to a flexible thermoelectric device and a manufacturing method thereof, and a thermoelectric material is formed on a mesh type substrate made of a glass fabric, and the like. According to the present invention, since the thermoelectric material is supported by a mesh type substrate without a substrate made of alumina, and the like, the thermoelectric device has a high flexibility and a light weight, and thermal loss is minimized by the substrate to maximize thermoelectric efficiency.

Abstract translation: 柔性热电元件及其制造方法技术领域本发明涉及柔性热电元件及其制造方法，并且在由玻璃织物制成的网状基板上形成热电材料等。 根据本发明，由于热电材料由没有氧化铝等的基板的网状基板支撑，因此热电元件具有高的柔性和重量轻，并且通过基板使热损失最小化 热电效率。

公开(公告)号：US09129811B2

公开(公告)日：2015-09-08

申请号：US14132071

申请日：2013-12-18

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Byung Jin Cho ,  Jeong Hun Mun

IPC: H01L21/20 ,  H01L21/02 ,  H01L29/16 ,  H01L45/00

CPC classification number: H01L21/02664 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02527 ,  H01L21/0262 ,  H01L21/02645 ,  H01L21/02658 ,  H01L29/1606 ,  H01L45/1616

Abstract: This invention relates to a method and board for forming a graphene layer, and more particularly, to a method of forming a high-quality graphene layer using high pressure annealing and to a board used therein. The method of forming the graphene layer includes forming a reaction barrier layer on a substrate layer, forming a metal catalyst layer which functions as a catalyst for forming the graphene layer on the reaction barrier layer, subjecting a board including a stack of the layers to high pressure annealing, and growing the graphene layer on the metal catalyst layer. This board is subjected to high pressure annealing before growth of the graphene layer, and the reaction barrier layer is formed using a material having high adhesion energy to the metal catalyst layer so as to suppress migration of metal catalyst atoms.

Abstract translation: 本发明涉及用于形成石墨烯层的方法和板，更具体地说，涉及一种使用高压退火形成高品质石墨烯层的方法及其中使用的板。 形成石墨烯层的方法包括在基材层上形成反应阻挡层，形成用作在反应阻挡层上形成石墨烯层的催化剂的金属催化剂层，使包含层叠体的基板高 并且在金属催化剂层上生长石墨烯层。 该板在石墨烯层生长之前进行高压退火，并且使用对金属催化剂层具有高粘附能的材料形成反应阻挡层，以便抑制金属催化剂原子的迁移。

公开(公告)号：US12279413B2

公开(公告)日：2025-04-15

申请号：US17591381

申请日：2022-02-02

Applicant: SK hynix Inc. ,  Korea Advanced Institute of Science and Technology

Inventor： Hyunsoo Jin ,  Byung Jin Cho ,  Seongho Kim

IPC: H10B12/00 ,  H01G4/10 ,  H10D1/68

Abstract: Disclosed are a capacitor for DRAM, a DRAM including the same, and a method of fabricating the same. The DRAM capacitor according to an embodiment may include a first electrode of the DRAM; a second electrode spaced apart from the first electrode; and a dielectric layer including a HfZrO film disposed between the first electrode and the second electrode. The HfZrO film may have an intermediate state corresponding to a phase transition region between a first state in which a tetragonal crystalline phase with anti-ferroelectricity property or a tetragonal crystalline phase is dominant, and a second state in which the orthorhombic crystalline phase with anti-ferroelectricity property or the orthorhombic crystalline phase is dominant. The HfZrO film may include both of the tetragonal crystalline phase and the orthorhombic crystalline phase. The HfZrO film maintains an intermediate state corresponding to the phase transition region within the operating voltage range of the capacitor.

公开(公告)号：US11984513B2

公开(公告)日：2024-05-14

申请号：US17501405

申请日：2021-10-14

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Byung Jin Cho ,  Min Ju Kim ,  Eui Joong Shin ,  Jae Joong Jung

IPC: H10K10/46 ,  H01L29/423 ,  H01L29/792

CPC classification number: H01L29/792 ,  H01L29/4234 ,  H10K10/46

Abstract: A charge trapping non-volatile organic memory device according to the present invention has a structure in which an organic matter-based blocking layer, a trapping layer, and a tunneling layer are sequentially positioned between a gate and an organic semiconductor layer positioned on an insulating substrate, the trapping layer including a metal oxide and a polymer, and has an organic-inorganic composite film in which the metal oxide is dispersed in a polymer matrix in units of atoms.

公开(公告)号：US10535514B2

公开(公告)日：2020-01-14

申请号：US15247817

申请日：2016-08-25

Applicant: Korea Advanced Institute of Science and Technology ,  Lam Research Corporation

Inventor： Byung Jin Cho ,  Sung Gap Im ,  Seong Jun Yoon ,  Kwanyong Pak ,  Hyungsuk Alexander Yoon

IPC: H01L21/02

Abstract: Provided are methods of sealing open pores of a surface of a porous dielectric material using an initiated chemical vapor deposition (iCVD) process. In one example method of sealing open pores, since the polymer thin film having a significantly thin thickness may be formed by a solvent-free vapor deposition method without plasma treatment, it is possible to minimize deterioration of characteristics of the dielectric material vulnerable to plasma and a chemical solution.

公开(公告)号：US09428829B2

公开(公告)日：2016-08-30

申请号：US14132121

申请日：2013-12-18

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Byung Jin Cho ,  Jeong Hun Mun

IPC: C23C16/26 ,  C23C16/40 ,  C01B31/04 ,  C23C14/02

CPC classification number: C23C16/26 ,  C01B32/186 ,  C23C14/024 ,  C23C14/025 ,  Y10T428/30 ,  Y10T428/31678

Abstract: A method of forming a high-quality graphene layer including forming a board layer; forming a stress reduction layer on the board layer; forming a metal catalyst layer on the stress reduction layer, the metal catalyst layer functioning as a catalyst for forming the graphene layer; and growing a graphene layer on the metal catalyst layer. The stress reduction layer reduces the stress of the metal thin film, thus, improving crystallinity and surface roughness of the metal thin film, and thereby effectively forming a high-quality graphene layer.

Abstract translation: 一种形成高质量石墨烯层的方法，包括形成板层; 在所述基板层上形成应力减小层; 在所述应力还原层上形成金属催化剂层，所述金属催化剂层用作形成所述石墨烯层的催化剂; 并在金属催化剂层上生长石墨烯层。 应力降低层降低金属薄膜的应力，从而提高金属薄膜的结晶度和表面粗糙度，有效地形成高品质的石墨烯层。

公开(公告)号：US20150280011A1

公开(公告)日：2015-10-01

申请号：US14256895

申请日：2014-04-18

Applicant: Korea Advanced Institute of Science and Technology ,  Lam Research Corporation

Inventor： Byung Jin Cho ,  Jae Hoon Bong ,  Onejae Sul ,  Hyungsuk Alexander Yoon

IPC: H01L29/786 ,  H01L21/228 ,  H01L21/22

CPC classification number: H01L29/78684 ,  H01L21/2225 ,  H01L21/228 ,  H01L29/1606 ,  H01L29/66742 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78696

Abstract: This disclosure relates to a method of manufacturing n-doped graphene and an electrical component using ammonium fluoride (NH4F), and to graphene and an electrical component thereby. An example method of manufacturing n-doped graphene includes (a) preparing graphene and ammonium fluoride (NH4F); and (b) exposing the graphene to the ammonium fluoride (NH4F), wherein through (b), a fluorine layer is formed on part or all of upper and lower surfaces of a graphene layer, and ammonium ions are physisorbed to part or all of the upper and lower surfaces of the graphene layer or defects between carbon atoms of the graphene layer, thereby maintaining or further improving superior electrical properties of graphene including charge mobility while performing n-doping of graphene.

Abstract translation: 本公开内容涉及使用氟化铵（NH 4 F）制造n掺杂石墨烯的方法和由此形成的石墨烯和电气部件的方法。 制造n掺杂石墨烯的示例性方法包括（a）制备石墨烯和氟化铵（NH 4 F）; 和（b）将石墨烯暴露于氟化铵（NH 4 F）中，其中通过（b）在石墨烯层的上表面和下表面的一部分或全部上形成氟层，并将铵离子物理吸附到部分或全部 石墨烯层的上表面和下表面或石墨烯层的碳原子之间的缺陷，由此维持或进一步改善石墨烯的优异的电性能，包括电荷迁移率，同时进行石墨烯的n掺杂。

公开(公告)号：US20140299975A1

公开(公告)日：2014-10-09

申请号：US14132071

申请日：2013-12-18

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Byung Jin Cho ,  Jeong Hun Mun

IPC: H01L21/02 ,  H01L29/16

CPC classification number: H01L21/02664 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02527 ,  H01L21/0262 ,  H01L21/02645 ,  H01L21/02658 ,  H01L29/1606 ,  H01L45/1616

Abstract: This invention relates to a method and board for forming a graphene layer, and more particularly, to a method of forming a high-quality graphene layer using high pressure annealing and to a board used therein. The method of forming the graphene layer includes forming a reaction barrier layer on a substrate layer, forming a metal catalyst layer which functions as a catalyst for forming the graphene layer on the reaction barrier layer, subjecting a board including a stack of the layers to high pressure annealing, and growing the graphene layer on the metal catalyst layer. This board is subjected to high pressure annealing before growth of the graphene layer, and the reaction barrier layer is formed using a material having high adhesion energy to the metal catalyst layer so as to suppress migration of metal catalyst atoms.

Abstract translation: 本发明涉及用于形成石墨烯层的方法和板，更具体地说，涉及一种使用高压退火形成高品质石墨烯层的方法及其中使用的板。 形成石墨烯层的方法包括在基材层上形成反应阻挡层，形成用作在反应阻挡层上形成石墨烯层的催化剂的金属催化剂层，使包含层叠层的基板高 并且在金属催化剂层上生长石墨烯层。 该板在石墨烯层生长之前进行高压退火，并且使用对金属催化剂层具有高粘附能的材料形成反应阻挡层，以便抑制金属催化剂原子的迁移。

公开(公告)号：US20140295080A1

公开(公告)日：2014-10-02

申请号：US14132121

申请日：2013-12-18

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Byung Jin Cho ,  Jeong Hun Mun

IPC: C23C16/26

CPC classification number: C23C16/26 ,  C01B32/186 ,  C23C14/024 ,  C23C14/025 ,  Y10T428/30 ,  Y10T428/31678

Abstract: This invention relates to a board and method for forming a graphene layer, and more particularly, to a board for use in forming a graphene layer, which has a structure able to improve properties of the graphene layer formed thereon, and to a method of forming a high-quality graphene layer using the same. The board of the invention includes a board layer, a metal catalyst layer formed on the board layer and functioning as a catalyst for forming the graphene layer, and a stress reduction layer disposed between the board layer and the metal catalyst layer so as to reduce stress of the metal catalyst layer, wherein the stress reduction layer able to reduce stress of the metal thin film is provided, thus improving crystallinity and surface roughness of the metal thin film, thereby effectively forming a high-quality graphene layer.

Abstract translation: 本发明涉及一种用于形成石墨烯层的板和方法，更具体地，涉及一种用于形成石墨烯层的板，其具有能够改善其上形成的石墨烯层的性能的结构，以及形成方法 使用其的高品质石墨烯层。 本发明的电路板包括：基板层，形成在电路板层上的金属催化剂层，用作用于形成石墨烯层的催化剂，以及设置在电路板层和金属催化剂层之间的应力降低层，以减少应力 的金属催化剂层，其中提供能够降低金属薄膜的应力的应力降低层，从而提高金属薄膜的结晶度和表面粗糙度，从而有效地形成高质量的石墨烯层。

公开(公告)号：US20180277362A1

公开(公告)日：2018-09-27

申请号：US15923918

申请日：2018-03-16

Applicant: Lam Research Corporation ,  Korea Advanced Institute of Science and Technology

Inventor： Byung Jin Cho ,  Sung Gap Im ,  Seong Jun Yoon ,  Kwanyong Pak ,  Hyungsuk Alexander Yoon

IPC: H01L21/02 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  B05D1/00 ,  B05D3/02

CPC classification number: H01L21/02277 ,  B05D1/60 ,  B05D3/0254 ,  H01L21/02118 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/7682 ,  H01L21/76829 ,  H01L23/5226 ,  H01L23/5329 ,  H01L2221/1047

Abstract: Provided are a method of locally sealing only pores present in a surface part of a porous dielectric material by forming a polymer thin film through an initiated chemical vapor deposition (iCVD) method using an initiator, and a method of minimizing an increase in a dielectric constant induced therefrom.