-
公开(公告)号:US20190172788A1
公开(公告)日:2019-06-06
申请号:US16322401
申请日:2017-05-12
发明人: Naoki KATO , Shogo MORI , Harumitsu SATO , Hiroki WATANABE , Hiroshi YUGUCHI , Yuri OTOBE
IPC分类号: H01L23/538 , H01L25/065
摘要: A semiconductor module includes a substrate, two bare chips (semiconductor elements) mounted on the substrate, and a case fixed to the substrate. A conductor pattern and five signal patterns are provided for each bare chip on an upper surface of an insulating substrate. Signal electrodes and the signal patterns of the bare chips are connected to by conductive plates. An insulating member is provided on connecting portions of the conductive plates.
-
公开(公告)号:US20150137344A1
公开(公告)日:2015-05-21
申请号:US14543108
申请日:2014-11-17
发明人: Shogo MORI , Yuri OTOBE , Shinsuke NISHI
IPC分类号: H01L23/367 , H01L21/56 , H01L23/00 , H01L23/31
CPC分类号: H01L24/33 , H01L23/3121 , H01L23/36 , H01L23/3735 , H01L23/4334 , H01L23/473 , H01L23/49811 , H01L24/29 , H01L24/32 , H01L24/40 , H01L24/83 , H01L24/84 , H01L24/92 , H01L25/072 , H01L25/18 , H01L2224/291 , H01L2224/32227 , H01L2224/40095 , H01L2224/40105 , H01L2224/40155 , H01L2224/40225 , H01L2224/73263 , H01L2224/83801 , H01L2224/92246 , H01L2924/00014 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2224/37099
摘要: A semiconductor device has a circuit board including an insulation layer, a wiring layer formed on one surface of the insulation layer, and a buffer layer formed on the other surface of the insulation layer, a semiconductor element bonded to the wiring layer, a radiator member bonded to the buffer layer of the circuit board, and a resin member to seal the semiconductor element and an entire surface of the circuit board including an outer peripheral surface of the buffer layer in the circuit board. A method for manufacturing the semiconductor device includes bonding the buffer layer of the circuit board to the radiator member, bonding the semiconductor element to the wiring layer of the circuit board, and sealing the semiconductor element and an entire surface of the circuit board including an outer peripheral surface of the buffer layer in the circuit board with resin after the two bonding steps.
摘要翻译: 半导体器件具有电路板,其包括绝缘层,形成在绝缘层的一个表面上的布线层和形成在绝缘层的另一个表面上的缓冲层,接合到布线层的半导体元件,散热器构件 接合到电路板的缓冲层,以及树脂构件,用于密封半导体元件和包括电路板中的缓冲层的外周表面的电路板的整个表面。 一种半导体装置的制造方法,其特征在于,将所述电路基板的缓冲层与所述散热部件接合,将所述半导体元件接合到所述电路基板的配线层,并将所述半导体元件和所述电路基板的整体表面 电路板的缓冲层的周边表面与两个接合步骤之后的树脂。
-
公开(公告)号:US20170280595A1
公开(公告)日:2017-09-28
申请号:US15528603
申请日:2015-11-06
发明人: Shogo MORI , Naoki KATO , Hiroshi YUGUCHI , Yoshitaka IWATA , Masahiko KAWABE , Yuri OTOBE
CPC分类号: H05K7/20927 , H01L21/4846 , H01L23/29 , H01L23/3121 , H01L2224/32221 , H01L2924/0002 , H02M7/003 , H02M7/42 , H02M2001/327 , H05K1/0204 , H05K1/0207 , H05K1/021 , H05K1/185 , H05K3/4697 , H05K7/14 , H05K7/20263 , H05K7/20436 , H05K2201/1003 , H05K2201/10166 , H01L2924/00
摘要: An electronic device includes a heat dissipation member, a power element that is thermally coupled to the heat dissipation member, and a first conductive layer to which the power element is electrically coupled. The electronic device further includes a control element that controls a switching operation of the power element, a second conductive layer to which the control element is electrically coupled, and a resin layer arranged between the first conductive layer and the second conductive layer. The power element is embedded in the resin layer. The first conductive layer, the resin layer, and the second conductive layer are stacked on the heat dissipation member in this order from the ones closer to the heat dissipation member.
-
公开(公告)号:US20140035120A1
公开(公告)日:2014-02-06
申请号:US13954464
申请日:2013-07-30
发明人: Shinsuke NISHI , Shogo MORI , Yuri OTOBE , Naoki KATO
IPC分类号: H01L23/42
CPC分类号: H01L23/42 , H01L23/16 , H01L23/3121 , H01L23/4334 , H01L23/473 , H01L23/50 , H01L23/562 , H01L24/36 , H01L24/40 , H01L25/072 , H01L25/18 , H01L2224/40137 , H01L2224/40225 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/37099 , H01L2224/84
摘要: A semiconductor unit includes an insulation layer, a conductive layer bonded to one side of the insulation layer, a semiconductor device mounted on the conductive layer, a cooler thermally coupled to the other side of the insulation layer, a first bus bar having a bonding surface bonded to the semiconductor device or the conductive layer and a non-bonding surface that is the part of the first bus bar other than the bonding surface, and a second bus bar having a bonding surface bonded to the semiconductor device or the conductive layer and a non-bonding surface that is the part of the second bus bar other than the bonding surface. The second bus bar has a greater ratio of the area of the bonding surface to the area of the non-bonding surface than the first bus bar. The second bus bar has a lower electric resistance than the first bus bar.
摘要翻译: 半导体单元包括绝缘层,接合到绝缘层的一侧的导电层,安装在导电层上的半导体器件,与绝缘层的另一侧热耦合的冷却器,具有接合表面的第一母线 接合到所述半导体器件或所述导电层以及作为所述第一母线的部分而不是所述接合表面的非接合表面,以及具有接合到所述半导体器件或所述导电层的接合表面的第二母线和 非接合表面,其是除了接合表面之外的第二母线的一部分。 第二母线具有比第一母线更大的接合表面面积与非接合表面面积的比例。 第二母线具有比第一母线低的电阻。
-
公开(公告)号:US20180191220A1
公开(公告)日:2018-07-05
申请号:US15740159
申请日:2016-06-23
发明人: Naoki KATO , Shogo MORI , Yuri OTOBE , Hiroshi YUGUCHI , Yusuke KINOSHITA
CPC分类号: H02K5/20 , F04B35/04 , F04B39/00 , F04B39/064 , F04B39/121 , F04C29/0085 , F04C29/04 , F04C29/047 , F04C2240/403 , F04C2240/808 , H02K5/225 , H02K7/14 , H02K9/04 , H02K11/33 , H02K2209/00 , H02M7/003
摘要: A motor-driven compressor includes a compressor unit, a motor unit including a motor, and an inverter unit that drives the motor. The compressor unit, the motor unit, and the inverter unit are lined up in an axial direction of the motor. The motor-driven compressor further includes a housing that accommodates the compressor unit and the motor unit. The inverter unit includes an inverter module. The inverter module includes U-phase, V-phase, and W-phase semiconductor elements that respectively configure U-phase, V-phase, and W-phase arms and a substrate on which the semiconductor elements are bare-chip-mounted. The substrate includes a heat dissipation surface that is thermally connected to the housing. The semiconductor elements are arranged along a contour of the housing.
-
公开(公告)号:US20140091444A1
公开(公告)日:2014-04-03
申请号:US14032690
申请日:2013-09-20
发明人: Shogo MORI , Yuri OTOBE , Naoki KATO , Shinsuke NISHI
CPC分类号: H01L23/562 , H01L21/50 , H01L23/3735 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor unit includes a base, an insulating substrate bonded to the base, a conductive plate made of a metal of poor solderability, a semiconductor device mounted to the insulating substrate through the conductive plate, and a metal plate interposed between the conductive plate and the semiconductor device and made of a metal of good solderability as compared to the metal used for the conductive plate. The base, the insulating substrate, the conductive plate and the metal plate are brazed together, and the semiconductor device is soldered to the metal plate.
摘要翻译: 半导体单元包括基底,与基底结合的绝缘基板,由可焊性差的金属制成的导电板,通过导电板安装到绝缘基板的半导体器件,以及介于导电板和导电板之间的金属板 与用于导电板的金属相比,具有良好可焊性的金属制成。 将基底,绝缘基板,导电板和金属板钎焊在一起,将半导体器件焊接到金属板。
-
公开(公告)号:US20140090809A1
公开(公告)日:2014-04-03
申请号:US14035362
申请日:2013-09-24
发明人: Shogo MORI , Yuri OTOBE , Naoki KATO , Shinsuke NISHI
IPC分类号: F28F3/02
CPC分类号: F28F3/02 , F28F3/022 , F28F3/12 , F28F13/06 , H01L23/473 , H01L2924/0002 , H01L2924/00
摘要: A cooling device to which a heating element is joinable includes a base, a plurality of first groups of pin fins and a plurality of second groups of pin fins. The second groups and the first groups are arranged alternately in a flow direction in which a cooling medium flows through a passage of the base. A second outermost pin fin of each second group is more distant from a side surface of the base than a first outermost pin fin of each first group. Width between a side surface of the second outermost pin fin of each second group and the side surface of the base is the same as or larger than width between a side surface of the pin fin of each first group that is adjacent to the first outermost pin fin of the first group and the side surface of the second outermost pin fin.
摘要翻译: 加热元件可连接的冷却装置包括基座,多个第一组销翅片和多个第二组销翅片组。 第二组和第一组沿冷却介质流过基座的通道的流动方向交替布置。 每个第二组的第二最外面的销翅片比每个第一组的第一最外面的销翅片更远离基座的侧表面。 每个第二组的第二最外侧销翅片的侧表面与底座的侧表面之间的宽度与第一组的第一最小销相邻的每个第一组的销翅片的侧表面之间的宽度相同或更大 第一组的翅片和第二最外面的销翅片的侧表面。
-
公开(公告)号:US20150176877A1
公开(公告)日:2015-06-25
申请号:US14578753
申请日:2014-12-22
发明人: Shogo MORI , Yuri OTOBE , Shinsuke NISHI
IPC分类号: F25B31/02
CPC分类号: F25B31/02 , F04B39/06 , F04B39/064 , F04B39/121 , F25B31/006 , F25B49/025 , F25B2400/077 , F25B2600/021 , Y02B30/741
摘要: There is provided a motor-driven compressor including a semiconductor device that comprises a compression mechanism, a motor, a housing, a wall, an electronic component, and a resin member. The motor drives the compression mechanism. The housing accommodates therein the compression mechanism and the motor. The wall extends from an outer surface of the housing so as to surround a part thereof and have an opened end and cooperates with the outer surface of the housing to form a casing. The electronic component is accommodated in the casing and includes a semiconductor module that includes a circuit board connected to the outer surface of the housing and a semiconductor element mounted to the circuit board. The resin member seals an entirety of the electronic component in the casing.
摘要翻译: 本发明提供一种电动压缩机,其包括:半导体装置,其包括压缩机构,电动机,壳体,壁,电子部件和树脂部件。 电机驱动压缩机构。 壳体容纳压缩机构和电动机。 该壁从壳体的外表面延伸以便围绕其一部分并且具有开口端并且与外壳的外表面配合以形成外壳。 电子部件容纳在壳体中,并且包括半导体模块,其包括连接到壳体的外表面的电路板和安装到电路板的半导体元件。 树脂构件密封壳体中的整个电子部件。
-
公开(公告)号:US20140117508A1
公开(公告)日:2014-05-01
申请号:US14064806
申请日:2013-10-28
发明人: Shinsuke NISHI , Shogo MORI , Yuri OTOBE , Naoki KATO
IPC分类号: H01L29/06
CPC分类号: H01L23/00 , C04B37/021 , C04B2237/343 , C04B2237/366 , C04B2237/402 , C04B2237/86 , H01L23/15 , H01L23/3735 , H01L23/473 , H01L25/072 , H01L2224/32225 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要: A semiconductor unit includes an insulating substrate having a first surface and a second surface opposite to the first surface, a first conductive layer bonded to the first surface of the insulating substrate, a second conductive layer bonded to the first surface of the insulating substrate at a position different from that for the first conductive layer, a stress relief layer bonded to the second surface of the insulating substrate, a radiator bonded to the stress relief layer on the side thereof opposite to the insulating substrate, and semiconductor devices electrically bonded to the respective first and second conductive layers. The insulating substrate has a low-rigidity portion provided between the first and second conductive layers and having a lower rigidity than the rest of the insulating substrate, and at least the low-rigidity portion is sealed and covered by a mold resin.
摘要翻译: 半导体单元包括具有第一表面和与第一表面相对的第二表面的绝缘基板,与绝缘基板的第一表面接合的第一导电层,在绝缘基板的第一表面上接合的第二导电层, 位置不同于第一导电层的位置,与绝缘基板的第二表面接合的应力消除层,与绝缘基板相对的一侧上的应力消除层接合的散热器,以及与绝缘基板电连接的半导体器件 第一和第二导电层。 绝缘基板具有设置在第一和第二导电层之间并且具有比绝缘基板的其余部分更低的刚性的低刚性部分,并且至少低刚性部分被模制树脂密封和覆盖。
-
公开(公告)号:US20140008782A1
公开(公告)日:2014-01-09
申请号:US13934944
申请日:2013-07-03
发明人: Shinsuke NISHI , Shogo MORI , Yuri OTOBE , Naoki KATO
IPC分类号: H01L23/34
CPC分类号: H01L23/34 , H01L23/3735 , H01L23/473 , H01L24/34 , H01L24/37 , H01L24/40 , H01L24/41 , H01L2224/32245 , H01L2224/371 , H01L2224/37599 , H01L2224/40137 , H01L2224/83801 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/15787 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/84
摘要: A semiconductor unit includes a base having a surface where a first insulation layer is disposed, a second insulation layer spaced apart from the first insulation layer to form a region therebetween and disposed parallel to the surface of the base where the first insulation layer is disposed, a single conductive layer disposed across the first insulation layer and the second insulation layer, and a semiconductor device bonded to the conductive layer.
摘要翻译: 半导体单元包括具有设置有第一绝缘层的表面的基底,与第一绝缘层间隔开的第二绝缘层,以在其间设置平行于第一绝缘层的基底表面设置的区域, 跨越第一绝缘层和第二绝缘层布置的单个导电层,以及结合到导电层的半导体器件。
-
-
-
-
-
-
-
-
-