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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190140085A1

    公开(公告)日：2019-05-09

    申请号：US16235864

    申请日：2018-12-28

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Tsuneo Ogura ,  Tomoko Matsudai

    IPC分类号： H01L29/739 ,  H01L29/08 ,  H01L29/423 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/36

    摘要： A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first semiconductor region and the second electrode, a second semiconductor region between the first semiconductor region and the second electrode and between the third electrode and the fourth electrode, a third semiconductor region between the second semiconductor region and the second electrode, a fourth electrode between the first semiconductor region and the second electrode to be electrically connected to the second electrode, and a fifth semiconductor region between the first electrode and the first semiconductor region. A first insulating film is provided between the third electrode and the first semiconductor region, the second semiconductor region, the third semiconductor region and the second electrode. A second insulating film is provided between the fourth semiconductor region and the first semiconductor region, the second semiconductor region, and the fourth semiconductor region.

    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10141455B2

    公开(公告)日：2018-11-27

    申请号：US15460722

    申请日：2017-03-16

    申请人： Kabushiki Kaisha Toshiba

    发明人： Tsuneo Ogura ,  Shinichiro Misu ,  Tomoko Matsudai ,  Norio Yasuhara

    IPC分类号： H01L21/02 ,  H01L29/868 ,  H01L21/762 ,  H01L29/08 ,  H01L29/06 ,  H01L29/40 ,  H01L21/765 ,  H01L27/06 ,  H01L29/739 ,  H01L29/872

    摘要： According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an insulating region, and a third semiconductor region of the first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and is in contact with the first electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The second semiconductor region is in contact with the second electrode. The insulating region extends in a direction from the second electrode toward the first semiconductor region. The insulating region is in contact with the second electrode. The third semiconductor region is provided between the second semiconductor region and the insulating region.

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150262999A1

    公开(公告)日：2015-09-17

    申请号：US14483831

    申请日：2014-09-11

    申请人： Kabushiki Kaisha Toshiba

    发明人： Tsuneo Ogura

    IPC分类号： H01L27/06 ,  H01L29/10 ,  H01L29/861 ,  H01L29/739

    CPC分类号： H01L27/0635 ,  H01L27/0727 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/7397 ,  H01L29/861 ,  H01L29/8613

    摘要： According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, third, fourth, fifth, sixth, and seventh semiconductor regions. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first electrode and the first semiconductor region. The third and fourth semiconductor regions are provided between the first electrode and the second semiconductor region. The fifth semiconductor region is positioned between the third semiconductor region and the second electrode, and is provided between the first semiconductor region and the second electrode. The sixth semiconductor region is positioned between the fourth semiconductor region and the second electrode, and is provided between the first semiconductor region and the second electrode.The seventh semiconductor region is provided between the fifth semiconductor region and the second electrode. The third electrode is provided on the seventh, fifth, and first semiconductor regions.

    摘要翻译： 根据一个实施例，半导体器件包括第一，第二和第三电极，第一，第二，第三，第四，第五，第六和第七半导体区域。 第一半导体区域设置在第一和第二电极之间。 第二半导体区域设置在第一电极和第一半导体区域之间。 第三和第四半导体区域设置在第一电极和第二半导体区域之间。 第五半导体区域位于第三半导体区域和第二电极之间，并且设置在第一半导体区域和第二电极之间。 第六半导体区域位于第四半导体区域和第二电极之间，并且设置在第一半导体区域和第二电极之间。 第七半导体区域设置在第五半导体区域和第二电极之间。 第三电极设置在第七，第五和第一半导体区域上。

    Insulated gate bipolar transistor having control electrode disposed in trench
    7.
    发明授权
    Insulated gate bipolar transistor having control electrode disposed in trench 有权
    具有设置在沟槽中的控制电极的绝缘栅双极晶体管

    公开(公告)号：US08853775B2

    公开(公告)日：2014-10-07

    申请号：US14021586

    申请日：2013-09-09

    申请人： Kabushiki Kaisha Toshiba

    发明人： Tsuneo Ogura ,  Kazutoshi Nakamura ,  Hideaki Ninomiya ,  Tomoko Matsudai ,  Yuichi Oshino

    IPC分类号： H01L29/66 ,  H01L29/739 ,  H01L29/423 ,  H01L29/06 ,  H01L29/10

    CPC分类号： H01L29/7395 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/7397

    摘要： In one embodiment, a semiconductor device includes a semiconductor substrate having first and second main surfaces, control electrodes disposed in trenches on the first main surface of the semiconductor substrate and extending in a first direction parallel to the first main surface, and control interconnects disposed on the first main surface of the semiconductor substrate and extending in a second direction perpendicular to the first direction. The semiconductor substrate includes a first semiconductor layer of a first conductivity type, second semiconductor layers of a second conductivity type on a surface of the first semiconductor layer on a first main surface side, third semiconductor layers of the first conductivity type disposed on surfaces of the second semiconductor layers on the first main surface side and extending in the second direction, and a fourth semiconductor layer of the second conductivity type on the second main surface of the semiconductor substrate.

    摘要翻译： 在一个实施例中，半导体器件包括具有第一和第二主表面的半导体衬底，控制电极设置在半导体衬底的第一主表面上的沟槽中并沿平行于第一主表面的第一方向延伸，并且控制互连设置在 半导体衬底的第一主表面并且沿与第一方向垂直的第二方向延伸。 半导体衬底包括第一导电类型的第一半导体层，第二导电类型的第二半导体层，在第一主表面侧上的第一半导体层的表面上，第一导电类型的第三半导体层设置在第一半导体层的表面上 在第一主表面侧上延伸并在第二方向上延伸的第二半导体层，以及在半导体衬底的第二主表面上的第二导电类型的第四半导体层。

    POWER SEMICONDUCTOR DEVICE
    8.
    发明申请
    POWER SEMICONDUCTOR DEVICE 审中-公开
    功率半导体器件

    公开(公告)号：US20140084333A1

    公开(公告)日：2014-03-27

    申请号：US14017986

    申请日：2013-09-04

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Kazutoshi Nakamura ,  Tsuneo Ogura ,  Hideaki Ninomiya

    IPC分类号： H01L29/739

    CPC分类号： H01L29/7395 ,  H01L29/0696 ,  H01L29/66348 ,  H01L29/7397

    摘要： In general, according to one embodiment, a power semiconductor device includes a first, a second, a third, a fourth, and a fifth electrode, and a first, a second, a third, and a fourth semiconductor layer. The first electrode includes a first and a second face. The first semiconductor layer is provided on a side of the first face of the first electrode. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The fourth semiconductor layer is provided on the third semiconductor layer. The second electrode is electrically connected to the fourth semiconductor layer. The third and fourth electrode are provided at the second semiconductor layer and the third semiconductor layer with an insulating film interposed. The fifth electrode is provided between the third electrode and the fourth electrode with an insulating film interposed.

    摘要翻译： 通常，根据一个实施例，功率半导体器件包括第一，第二，第三，第四和第五电极以及第一，第二，第三和第四半导体层。 第一电极包括第一和第二面。 第一半导体层设置在第一电极的第一面的一侧。 第二半导体层设置在第一半导体层上。 第三半导体层设置在第二半导体层上。 第四半导体层设置在第三半导体层上。 第二电极电连接到第四半导体层。 第三和第四电极设置在第二半导体层和第三半导体层上，绝缘膜被插入。 第五电极设置在第三电极和第四电极之间，绝缘膜被插入。

    Semiconductor device
    9.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10553710B2

    公开(公告)日：2020-02-04

    申请号：US15837453

    申请日：2017-12-11

    申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

    发明人： Tsuneo Ogura ,  Tomoko Matsudai

    IPC分类号： H01L29/739 ,  H01L29/78 ,  H01L23/535 ,  H01L29/10 ,  H01L29/423 ,  H01L29/49

    摘要： According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a semiconductor layer provided between the first electrode and the second electrode, a plurality of gate electrodes provided in the semiconductor layer and extending in a first direction, a plurality of gate interconnects provided in the semiconductor layer and connected with the gate electrodes, the gate interconnects extending in a second direction crossing the first direction, an insulating film provided between the gate electrodes and the semiconductor layer, and between the gate interconnects and the semiconductor layer, and an inter-layer insulating film provided between the gate electrodes and the second electrode, and between the gate interconnects and the second electrode.