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    INTEGRATED REACTIVE MATERIAL ERASURE ELEMENT WITH PHASE CHANGE MEMORY
    1.
    发明申请
    INTEGRATED REACTIVE MATERIAL ERASURE ELEMENT WITH PHASE CHANGE MEMORY 有权

    公开(公告)号：US20210257410A1

    公开(公告)日：2021-08-19

    申请号：US16692586

    申请日：2019-11-22

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Matthew J. BrightSky ,  Cyril Cabral, JR. ,  Kenneth P. Rodbell

    IPC分类号： H01L27/24 ,  H01L45/00 ,  G11C13/00

    摘要： A reactive material erasure element comprising a reactive material is located between PCM cells and is in close proximity to the PCM cells. The reaction of the reactive material is trigger by a current applied by a bottom electrode which has a small contact area with the reactive material erasure element, thereby providing a high current density in the reactive material erasure element to ignite the reaction of the reactive material. Due to the close proximity of the PCM cells and the reactive material erasure element, the heat generated from the reaction of the reactive material can be effectively directed to the PCM cells to cause phase transformation of phase change material elements in the PCM cells, which in turn erases data stored in the PCM cells.

    SELECTIVE PHASE CHANGE MATERIAL GROWTH IN HIGH ASPECT RATIO DIELECTRIC PORES FOR SEMICONDUCTOR DEVICE FABRICATION
    2.
    发明申请
    SELECTIVE PHASE CHANGE MATERIAL GROWTH IN HIGH ASPECT RATIO DIELECTRIC PORES FOR SEMICONDUCTOR DEVICE FABRICATION 审中-公开

    公开(公告)号：US20190140171A1

    公开(公告)日：2019-05-09

    申请号：US16151052

    申请日：2018-10-03

    申请人： International Business Machines Corporation

    发明人： Matthew J. BrightSky ,  Robert Bruce ,  Takeshi Masuda

    IPC分类号： H01L45/00

    摘要： A metal liner is deposited conformally to a pore within a first dielectric material of a semiconductor device. The pore extends through the first dielectric material to a top surface of a first metal electrode. The metal liner is etched such that the metal liner only substantially remains on sidewalls of the pore. A phase change material is selectively deposited within the pore of the first dielectric layer to substantially fill the pore with the phase change material. The selective deposition of the phase change material produces a growth rate of phase change material on the metal liner at a substantially greater rate than a growth rate of the phase change material on exposed surfaces of the first dielectric material.

    PHASE CHANGE MEMORY WITH METASTABLE SET AND RESET STATES
    5.
    发明申请
    PHASE CHANGE MEMORY WITH METASTABLE SET AND RESET STATES 审中-公开
    相变更改存储器与可复制的设置和复位状态

    公开(公告)号：US20160125938A1

    公开(公告)日：2016-05-05

    申请号：US14749161

    申请日：2015-06-24

    申请人： International Business Machines Corporation

    发明人： Matthew J. BrightSky ,  SangBum Kim ,  Wanki Kim ,  Chung H. Lam

    IPC分类号： G11C13/00 ,  H01L45/00

    CPC分类号： G11C13/0004 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2013/0078 ,  G11C2013/0083 ,  G11C2013/0092 ,  H01L45/06 ,  H01L45/144

    摘要： A memory device that includes a phase change material. The phase change material is programmable to a metastable set state and metastable reset state. Furthermore, the phase change material includes an initial state with an initial electrical resistance between the set electrical resistance and the reset electrical resistance. The initial state is at a lower potential energy than the set state and the reset state. Thus, the electrical resistance of the phase change material programmed to the set state or the reset state drifts toward the initial electrical resistance over time. The memory device also includes a first electrode electrically coupled to a first area of the phase change material, and a second electrode electrically coupled to a second area of the phase change material.

    摘要翻译： 一种包括相变材料的存储器件。 相变材料可编程为亚稳态和亚稳态复位状态。 此外，相变材料包括在设定的电阻和复位电阻之间具有初始电阻的初始状态。 初始状态处于比设定状态和复位状态低的势能。 因此，被编程到设定状态或复位状态的相变材料的电阻随时间漂移到初始电阻。 存储器件还包括电耦合到相变材料的第一区域的第一电极和电耦合到相变材料的第二区域的第二电极。

    Integrated reactive material erasure element with phase change memory
    7.
    发明授权
    Integrated reactive material erasure element with phase change memory 有权

    公开(公告)号：US10535713B2

    公开(公告)日：2020-01-14

    申请号：US14871030

    申请日：2015-09-30

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Matthew J. BrightSky ,  Cyril Cabral, Jr. ,  Kenneth P. Rodbell

    IPC分类号： H01L27/24 ,  H01L45/00 ,  G11C13/00

    摘要： A reactive material erasure element including a reactive material is located between PCM cells and is in close proximity to the PCM cells. The reaction of the reactive material is trigger by a current applied by a bottom electrode which has a small contact area with the reactive material erasure element, thereby providing a high current density in the reactive material erasure element to ignite the reaction of the reactive material. Due to the close proximity of the PCM cells and the reactive material erasure element, the heat generated from the reaction of the reactive material can be effectively directed to the PCM cells to cause phase transformation of phase change material elements in the PCM cells, which in turn erases data stored in the PCM cells.

    SYMMETRICAL BIPOLAR JUNCTION TRANSISTOR ARRAY
    9.
    发明申请
    SYMMETRICAL BIPOLAR JUNCTION TRANSISTOR ARRAY 有权
    对称双极晶体管阵列

    公开(公告)号：US20150348844A1

    公开(公告)日：2015-12-03

    申请号：US14288600

    申请日：2014-05-28

    申请人： International Business Machines Corporation

    发明人： Matthew J. BrightSky ,  Jin Cai ,  SangBum Kim ,  Chung H. Lam ,  Tak H. Ning

    IPC分类号： H01L21/8222 ,  H01L27/22 ,  H01L27/24

    CPC分类号： H01L21/8222 ,  H01L27/1022 ,  H01L27/226 ,  H01L27/2445 ,  H01L29/66234

    摘要： A method of manufacturing a bipolar junction transistor (BJT) array may include forming a substrate of doped silicon and forming a plurality of BJTs on the substrate. Each of the BJTs may have a first region and a second region sandwiching a base region vertically. The first region may be in contact with the substrate, where the BJTs are formed in a first row and a second row. The first row and the second row may each have BJTs separated from one another by a word line distance and the first row and second row may be separated by a bit line distance. A plurality of word line contacts may be formed laterally enclosing and electrically connected to each base region of the BJTs. The word line contacts may have a lateral thickness more than one half the word line distance and less than one half the bit line distance.

    摘要翻译： 制造双极结型晶体管（BJT）阵列的方法可以包括形成掺杂硅的衬底并在衬底上形成多个BJT。 每个BJT可以具有第一区域和第二区域，垂直地夹着基底区域。 第一区域可以与基底接触，其中BJT形成在第一行和第二行中。 第一行和第二行可以各自具有通过字线距离彼此分开的BJT，并且第一行和第二行可以被位线距离分隔。 多个字线触点可以横向包围并电连接到BJT的每个基区。 字线触点可以具有大于字线距离的一半的横向厚度，并且小于位线距离的一半。

    Resistive memory with a stabilizer
    10.
    发明授权
    Resistive memory with a stabilizer 有权
    电阻记忆与稳定剂

    公开(公告)号：US09059404B2

    公开(公告)日：2015-06-16

    申请号：US13969220

    申请日：2013-08-16

    申请人： International Business Machines Corporation

    发明人： Matthew J. BrightSky ,  SangBum Kim ,  Chung H. Lam ,  Asit K. Ray ,  Norma E. Sosa Cortes

    IPC分类号： H01L21/00 ,  H01L45/00

    CPC分类号： H01L45/1683 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1608

    摘要： A resistive memory device and a method for fabricating the resistive memory device. The memory device includes a first electrode and a resistive memory element in electrical contact. The memory device also includes a non-programmable stabilizer element in electrical and thermal contact with the resistive memory element. The stabilizer element has at least one physical dimension based on a physical characteristic of the resistive memory element such that the maximum resistance of the stabilizer element is substantially less than the maximum resistance of the resistive memory element.

    摘要翻译： 一种电阻式存储器件及其制造方法。 存储器件包括电接触的第一电极和电阻存储元件。 存储器件还包括与电阻式存储器元件电接触和热接触的非可编程稳定器元件。 稳定器元件具有基于电阻性存储元件的物理特性的至少一个物理尺寸，使得稳定器元件的最大电阻基本上小于电阻式存储元件的最大电阻。