公开(公告)号：US20140054648A1

公开(公告)日：2014-02-27

申请号：US13595022

申请日：2012-08-27

申请人： Hiroshi Itokawa ,  Akira Hokazono

发明人： Hiroshi Itokawa ,  Akira Hokazono

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7853 ,  H01L29/66795 ,  H01L29/7848

摘要： Structures and methods are presented relating to formation of finFET semiconducting devices. A finFET device is presented comprising fin(s) formed on a substrate, wherein the fin(s) has a needle-shaped profile. The needle-shaped profile, in conjunction with at least a buffer layer or a doped layer, epitaxially formed on the fin(s), facilitates strain to be induced into the fin(s) by the buffer layer or the doped layer. The fin(s) can comprise silicon aligned on a first plane, while at least one of the buffer layer or the doped layer are grown on a second plane, the alignment of the first and second planes are disparate and are selected such that formation of the buffer layer or the doped layer generates a stress in the fin(s). The generated stress results in a strain being induced into the fin(s) channel region, which can improve electron and/or hole mobility in the channel.

摘要翻译： 提出了关于finFET半导体器件的形成的结构和方法。 提出了一种finFET器件，其包括形成在衬底上的鳍状物，其中鳍状物具有针状轮廓。 与在鳍上外延形成的至少一个缓冲层或掺杂层结合的针状轮廓有利于通过缓冲层或掺杂层将应变引入到鳍中。 鳍可以包括在第一平面上对准的硅，而缓冲层或掺杂层中的至少一个在第二平面上生长，第一和第二平面的对准是不同的，并且被选择为使得形成 缓冲层或掺杂层在散热片中产生应力。 产生的应力导致应变被引入鳍状沟道区域，这可以改善沟道中的电子和/或空穴迁移率。

公开(公告)号：US08729607B2

公开(公告)日：2014-05-20

申请号：US13595022

申请日：2012-08-27

申请人： Hiroshi Itokawa ,  Akira Hokazono

发明人： Hiroshi Itokawa ,  Akira Hokazono

IPC分类号： H01L29/76 ,  H01L29/78

CPC分类号： H01L29/7853 ,  H01L29/66795 ,  H01L29/7848

摘要： Structures and methods are presented relating to formation of finFET semiconducting devices. A finFET device is presented comprising fin(s) formed on a substrate, wherein the fin(s) has a needle-shaped profile. The needle-shaped profile, in conjunction with at least a buffer layer or a doped layer, epitaxially formed on the fin(s), facilitates strain to be induced into the fin(s) by the buffer layer or the doped layer. The fin(s) can comprise silicon aligned on a first plane, while at least one of the buffer layer or the doped layer are grown on a second plane, the alignment of the first and second planes are disparate and are selected such that formation of the buffer layer or the doped layer generates a stress in the fin(s). The generated stress results in a strain being induced into the fin(s) channel region, which can improve electron and/or hole mobility in the channel.

摘要翻译： 提出了关于finFET半导体器件的形成的结构和方法。 提出了一种finFET器件，其包括形成在衬底上的鳍状物，其中鳍状物具有针状轮廓。 与在鳍上外延形成的至少一个缓冲层或掺杂层结合的针状轮廓有利于通过缓冲层或掺杂层将应变引入到鳍中。 鳍可以包括在第一平面上对准的硅，而缓冲层或掺杂层中的至少一个在第二平面上生长，第一和第二平面的对准是不同的，并且被选择为使得形成 缓冲层或掺杂层在散热片中产生应力。 产生的应力导致应变被引入鳍状沟道区域，这可以改善沟道中的电子和/或空穴迁移率。

公开(公告)号：US20070166977A1

公开(公告)日：2007-07-19

申请号：US11644887

申请日：2006-12-26

申请人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

发明人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/28518 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7833

摘要： A semiconductor device manufacturing method is disclosed. A silicon-containing gate electrode is first formed above the surface of a silicon-containing semiconductor substrate. Then, a sidewall insulating film is formed on the sidewall of the gate electrode and a film of metal is formed on the semiconductor substrate to cover the gate electrode and the sidewall insulating film. The front and back sides of the semiconductor substrate are heated through heat conduction by an ambient gas. Thereby, the metal is caused to react with silicon contained in the semiconductor substrate and the gate electrode to form a metal silicide film.

摘要翻译： 公开了半导体器件制造方法。 首先在含硅半导体衬底的表面上形成含硅栅电极。 然后，在栅电极的侧壁上形成侧壁绝缘膜，并且在半导体衬底上形成金属膜以覆盖栅电极和侧壁绝缘膜。 通过环境气体的热传导来加热半导体衬底的正面和背面。 由此，使金属与包含在半导体衬底和栅电极中的硅反应，形成金属硅化物膜。

公开(公告)号：US20070075272A1

公开(公告)日：2007-04-05

申请号：US11519813

申请日：2006-09-13

申请人： Yoshimasa Kawase ,  Hiroshi Itokawa

发明人： Yoshimasa Kawase ,  Hiroshi Itokawa

IPC分类号： A61N5/00

CPC分类号： H01L22/12 ,  G01J5/0003 ,  H01L21/67115 ,  H01L21/67248 ,  H01L2924/0002 ,  Y10T29/41 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device by processing a wafer, comprises: measuring a reflectivity of a substrate peripheral structure before heating, the substrate peripheral structure being placed close to the wafer and being heated simultaneously with the wafer by a plurality of heat sources; measuring a wafer reflectivity of the wafer before the heating; calculating a wafer emissivity of the wafer from the wafer reflectivity; measuring a wafer radiation intensity of radiation emitted from the wafer during the heating; calculating a wafer temperature of the wafer from the wafer emissivity and the wafer radiation intensity; calculating a target value of on-wafer optical intensity on the wafer so that the wafer temperature becomes a preset temperature; calculating a target value of optical intensity on the substrate peripheral structure from a difference between the reflectivity of the substrate peripheral structure and the wafer reflectivity so that incident light being incident on the substrate peripheral structure and wafer incident light being incident on the wafer have an equal optical intensity; calculating target values of heat source optical intensity for heating by the heat sources so that the target value of on-wafer optical intensity and the target value of optical intensity of the substrate peripheral structure are achieved; calculating target values of heat source power so that the target values of heat source optical intensity are achieved; and inputting the target values of heat source power to the plurality of heat sources and causing the heat sources to emit light.

摘要翻译： 一种通过处理晶片制造半导体器件的方法，包括：在加热之前测量衬底周边结构的反射率，将衬底周边结构放置在靠近晶片并与多个热源同时与晶片同时加热; 在加热之前测量晶片的晶片反射率; 从晶片反射率计算晶片的晶片发射率; 测量在加热期间从晶片发射的辐射的晶片辐射强度; 从晶片发射率和晶片辐射强度计算晶片的晶片温度; 计算晶片上晶片上光强度的目标值，使得晶片温度成为预设温度; 从基板周边结构的反射率和晶片反射率之间的差异计算基板周边结构上的光强度的目标值，使得入射到基板周边结构上的入射光和入射在晶片上的晶片入射光具有相等的 光强度; 计算由热源加热的热源光强度的目标值，从而实现晶片间光学强度的目标值和基板周边结构的光强度的目标值; 计算热源功率的目标值，从而实现热源光强度的目标值; 并且将热源功率的目标值输入到多个热源并使热源发光。

公开(公告)号：US07031138B2

公开(公告)日：2006-04-18

申请号：US10315915

申请日：2002-12-09

申请人： Bum-Ki Moon ,  Gerhard Beitel ,  Osamu Arisumi ,  Hiroshi Itokawa

发明人： Bum-Ki Moon ,  Gerhard Beitel ,  Osamu Arisumi ,  Hiroshi Itokawa

IPC分类号： H01G4/20 ,  H01G4/06

CPC分类号： H01L28/56

摘要： In a capacitor and a method for its manufacture, a first electrode layer and a second electrode layer are formed such that a ferroelectric layer is situated between the first and second electrode layer. A first bilayer or multi-layer seed structure is formed between the ferroelectric layer and either the first electrode layer or the second electrode layer.

摘要翻译： 在电容器及其制造方法中，形成第一电极层和第二电极层，使得铁电层位于第一和第二电极层之间。 在铁电层与第一电极层或第二电极层之间形成第一双层或多层种子结构。

公开(公告)号：US20090263957A1

公开(公告)日：2009-10-22

申请号：US12401453

申请日：2009-03-10

申请人： Ichiro MIZUSHIMA ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

发明人： Ichiro MIZUSHIMA ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

IPC分类号： H01L21/20

CPC分类号： H01L21/02636 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由 的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中， 从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

公开(公告)号：US07557040B2

公开(公告)日：2009-07-07

申请号：US11644887

申请日：2006-12-26

申请人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

发明人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7833

摘要： A semiconductor device manufacturing method is disclosed. A silicon-containing gate electrode is first formed above the surface of a silicon-containing semiconductor substrate. Then, a sidewall insulating film is formed on the sidewall of the gate electrode and a film of metal is formed on the semiconductor substrate to cover the gate electrode and the sidewall insulating film. The front and back sides of the semiconductor substrate are heated through heat conduction by an ambient gas. Thereby, the metal is caused to react with silicon contained in the semiconductor substrate and the gate electrode to form a metal silicide film.

摘要翻译： 公开了半导体器件制造方法。 首先在含硅半导体衬底的表面上形成含硅栅电极。 然后，在栅电极的侧壁上形成侧壁绝缘膜，并且在半导体衬底上形成金属膜以覆盖栅电极和侧壁绝缘膜。 通过环境气体的热传导来加热半导体衬底的正面和背面。 由此，使金属与包含在半导体衬底和栅电极中的硅反应，形成金属硅化物膜。

公开(公告)号：US20090152622A1

公开(公告)日：2009-06-18

申请号：US12271102

申请日：2008-11-14

申请人： Hiroshi Itokawa ,  Ichiro Mizushima

发明人： Hiroshi Itokawa ,  Ichiro Mizushima

IPC分类号： H01L29/94

CPC分类号： H01L29/7848 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834

摘要： A semiconductor device includes a first semiconductor region having a channel region, and containing silicon as a main component, second semiconductor regions sandwiching the first semiconductor region, formed of SiGe, and applying stress to the first semiconductor region, cap layers provided on the second semiconductor regions, and formed of silicon containing carbon or SiGe containing carbon, and silicide layers provided on the cap layers, and formed of nickel silicide or nickel-platinum alloy silicide.

摘要翻译： 半导体器件包括具有沟道区域并且以硅为主要成分的第一半导体区域，夹置由SiGe形成的第一半导体区域的第二半导体区域，并向第一半导体区域施加应力，设置在第二半导体层上的盖层 区域，并且由含硅的碳或含SiGe的碳形成，以及设置在盖层上的由硅化镍或镍 - 铂合金硅化物形成的硅化物层。

公开(公告)号：US07456456B2

公开(公告)日：2008-11-25

申请号：US11616680

申请日：2006-12-27

申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Rainer Bruchhaus

发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Rainer Bruchhaus

IPC分类号： H01L29/94

CPC分类号： H01L28/65 ,  H01L27/10808 ,  H01L27/10852 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

摘要： A semiconductor device according to the present invention comprises a semiconductor substrate, a capacitor including a lower electrode disposed above the semiconductor substrate, a dielectric film disposed above the lower electrode, and an upper electrode disposed above the dielectric film, the upper electrode including metal oxide formed of ABO3 perovskite oxide and containing at least an Ru element as a B site element, and a metal film containing a Ti element being disposed between the dielectric film and the upper electrode.

摘要翻译： 根据本发明的半导体器件包括半导体衬底，包括设置在半导体衬底上的下电极的电容器，设置在下电极上方的电介质膜和设置在电介质膜上方的上电极，上电极包括金属氧化物 由ABO 3钙钛矿氧化物形成，并且至少含有Ru元素作为B位元素，以及含有Ti元素的金属膜设置在电介质膜和上电极之间。

公开(公告)号：US07259094B2

公开(公告)日：2007-08-21

申请号：US11110933

申请日：2005-04-21

申请人： Katsuaki Natori ,  Keisuke Nakazawa ,  Koji Yamakawa ,  Hiroyuki Kanaya ,  Yoshinori Kumura ,  Hiroshi Itokawa ,  Osamu Arisumi

发明人： Katsuaki Natori ,  Keisuke Nakazawa ,  Koji Yamakawa ,  Hiroyuki Kanaya ,  Yoshinori Kumura ,  Hiroshi Itokawa ,  Osamu Arisumi

IPC分类号： H01L21/44 ,  C23C16/00

CPC分类号： H01L27/11502 ,  C23C14/08 ,  C23C14/5806 ,  H01L21/67115 ,  H01L27/11507 ,  H01L28/65

摘要： An apparatus for manufacturing a semiconductor device is disclosed which comprises a chamber which holds a to-be-processed substrate having a film containing at least one kind of metal element which will become a component of a volatile metal compound, a heater which heats the substrate held in the chamber, and an adsorbent which is provided in the chamber and which adsorbs the volatile metal compound generated from the film by heating the substrate.

摘要翻译： 公开了一种用于制造半导体器件的装置，其包括容纳待处理基板的室，该基板具有含有至少一种将成为挥发性金属化合物的成分的金属元素的膜，加热基板 保持在所述室中的吸附剂和设置在所述室中并通过加热所述基板吸附由所述膜产生的挥发性金属化合物的吸附剂。