公开(公告)号：US09478651B2

公开(公告)日：2016-10-25

申请号：US14732680

申请日：2015-06-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L29/06 ,  H01L29/778 ,  H01L27/088 ,  H01L21/8252 ,  H01L27/06 ,  H01L27/095 ,  H01L29/872 ,  H01L29/205 ,  H01L29/66 ,  H01L21/683 ,  G06F17/50 ,  H01L29/20 ,  H01L29/40

CPC classification number: H01L29/7786 ,  G06F17/5045 ,  G06F17/5063 ,  H01L21/6835 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/088 ,  H01L27/095 ,  H01L29/0634 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/66462 ,  H01L29/872 ,  H01L2221/68363

Abstract: A circuit includes a first field effect transistor having a gate, a first drain-source terminal, and a second drain-source terminal; and a second field effect transistor having a gate, a first drain-source terminal, and a second drain-source terminal. The second field effect transistor and the first field effect transistor are of the same type, i.e., both re-channel transistors or both p-channel transistors. The second drain-source terminal of the first field effect transistor is coupled to the first drain-source terminal of the second field effect transistor; and the gate of the second field effect transistor is coupled to the first drain-source terminal of the second field effect transistor. The resulting three-terminal device can be substituted for a single field effect transistor that would otherwise suffer breakdown under proposed operating conditions.

Abstract translation: 电路包括具有栅极的第一场效应晶体管，第一漏极 - 源极端子和第二漏极 - 源极端子; 以及具有栅极的第二场效应晶体管，第一漏极 - 源极端子和第二漏极 - 源极端子。 第二场效应晶体管和第一场效应晶体管是相同类型的，即重新沟道晶体管或两个p沟道晶体管。 第一场效应晶体管的第二漏极 - 源极端子耦合到第二场效应晶体管的第一漏极 - 源极端子; 并且第二场效应晶体管的栅极耦合到第二场效应晶体管的第一漏极 - 源极端子。 所得到的三端子器件可以替代否则在所提出的工作条件下会损坏的单个场效应晶体管。

公开(公告)号：US09472607B2

公开(公告)日：2016-10-18

申请号：US14717344

申请日：2015-05-20

Applicant: GLOBALFOUNDRIES INC.

Inventor： Bahman Hekmatshoartabari ,  Tak H. Ning ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L27/32 ,  H01L23/522 ,  H01L27/06 ,  H01L27/12 ,  H01L29/04 ,  H01L29/10 ,  H01L29/16 ,  H01L29/73 ,  H01L29/808 ,  G09G3/32

CPC classification number: H01L27/3276 ,  G09G3/3225 ,  G09G2300/0842 ,  H01L23/5226 ,  H01L27/0694 ,  H01L27/1207 ,  H01L27/3244 ,  H01L27/326 ,  H01L27/3265 ,  H01L29/04 ,  H01L29/1004 ,  H01L29/16 ,  H01L29/73 ,  H01L29/808 ,  H01L2251/5315 ,  H01L2251/533 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A hybrid integrated circuit device includes a semiconductor-on-insulator substrate having a base substrate, a semiconductor layer and a dielectric layer disposed therebetween, the base substrate being reduced in thickness. First devices are formed in the semiconductor layer, the first devices being connected to first metallizations on a first side of the dielectric layer. Second devices are formed in the base substrate, the second devices being connected to second metallizations formed on a second side of the dielectric layer opposite the first side. A through via connection is configured to connect the first metallizations to the second metallizations through the dielectric layer. Pixel circuits and methods are also disclosed.

公开(公告)号：US09406717B2

公开(公告)日：2016-08-02

申请号：US14725151

申请日：2015-05-29

Applicant: GLOBALFOUNDRIES INC.

Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L27/146

CPC classification number: H01L27/14692 ,  H01L27/1461 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14687

Abstract: A method for forming a back-illuminated image sensor includes forming a higher doped crystalline layer on a crystalline substrate, growing a lower doped crystalline layer on the higher doped crystalline layer and forming a photodiode and component circuitry from the lower doped crystalline layer. Metallization structures are formed to make connections to and between components. The crystalline substrate is removed to expose the higher doped crystalline layer. An optical component structure is provided on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for the photodiode and the component circuitry.

公开(公告)号：US09373691B2

公开(公告)日：2016-06-21

申请号：US13961282

申请日：2013-08-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L29/66 ,  H01L29/40 ,  H01L29/49 ,  H01L29/51 ,  H01L21/04 ,  H01L29/78 ,  H01L29/16 ,  H01L21/762

CPC classification number: H01L29/66068 ,  H01L21/049 ,  H01L21/76254 ,  H01L29/1608 ,  H01L29/401 ,  H01L29/4916 ,  H01L29/513 ,  H01L29/518 ,  H01L29/78

Abstract: A method for forming a semiconductor device includes forming a dielectric layer on a first substrate and wafer bonding the dielectric layer of the first substrate to a second substrate including SiC with a passivating layer formed on the SiC. A portion of the first substrate is removed from a side opposite the dielectric layer. The dielectric layer is patterned to form a gate dielectric for a field effect transistor formed on the second substrate.

Abstract translation: 一种形成半导体器件的方法包括在第一衬底上形成电介质层，并将第一衬底的电介质层与包含SiC的第二衬底相结合，并在SiC上形成钝化层。 从与电介质层相对的一侧去除第一衬底的一部分。 对电介质层进行构图以形成用于形成在第二衬底上的场效应晶体管的栅极电介质。

公开(公告)号：US09331229B2

公开(公告)日：2016-05-03

申请号：US14147939

申请日：2014-01-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L31/00 ,  H01L21/00 ,  H01L31/075 ,  H01L31/0304 ,  H01L31/074

CPC classification number: H01L31/075 ,  H01L31/03046 ,  H01L31/074 ,  Y02E10/544 ,  Y02P70/521

Abstract: An InxGa1-xAs interlayer is provided between a III-V base and an intrinsic amorphous semiconductor layer of a heterojunction III-V solar cell structure. Improved surface passivation and open circuit voltage may be obtained through the incorporation of the interlayer within the structure.

Abstract translation: 在III-V基极和异质结III-V族太阳能电池结构的本征非晶半导体层之间提供In x Ga 1-x As夹层。 可以通过在结构内并入中间层来获得改进的表面钝化和开路电压。

公开(公告)号：US09240432B2

公开(公告)日：2016-01-19

申请号：US14020473

申请日：2013-09-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L27/146

CPC classification number: H01L27/14692 ,  H01L27/1461 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14687

Abstract: A method for forming a back-illuminated image sensor includes forming a higher doped crystalline layer on a crystalline substrate, growing a lower doped crystalline layer on the higher doped crystalline layer and forming a photodiode and component circuitry from the lower doped crystalline layer. Metallization structures are formed to make connections to and between components. The crystalline substrate is removed to expose the higher doped crystalline layer. An optical component structure is provided on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for the photodiode and the component circuitry.

公开(公告)号：US09231094B2

公开(公告)日：2016-01-05

申请号：US13898585

申请日：2013-05-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Anirban Basu ,  Bahman Hekmatshoartabari ,  Davood Shahrjerdi

IPC: H01L29/778 ,  H01L29/66 ,  H01L21/283 ,  H01L21/027 ,  H01L21/311

CPC classification number: H01L29/7786 ,  H01L21/0272 ,  H01L21/283 ,  H01L21/31144 ,  H01L29/0843 ,  H01L29/207 ,  H01L29/267 ,  H01L29/401 ,  H01L29/42316 ,  H01L29/456 ,  H01L29/475 ,  H01L29/66431 ,  H01L29/66462

Abstract: Portions of a top compound semiconductor layer are recessed employing a gate electrode as an etch mask to form a source trench and a drain trench. A low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material in the source trench and the drain trench. Metallization is performed on physically exposed surfaces of the elemental semiconductor material portions in the source trench and the drain trench by depositing a metal and inducing interaction with the metal and the at least one elemental semiconductor material. A metal semiconductor alloy of the metal and the at least one elemental semiconductor material can be performed at a temperature lower than 600° C. to provide a high electron mobility transistor with a well-defined device profile and reliable metallization contacts.

Abstract translation: 使用栅电极作为蚀刻掩模来凹陷顶部化合物半导体层的部分以形成源极沟槽和漏极沟槽。 采用低温外延工艺在源极沟槽和漏极沟槽中沉积包括至少一种元素半导体材料的半导体材料。 通过沉积金属并诱导与金属和至少一种元素半导体材料的相互作用，在源沟槽和漏极沟槽中的元素半导体材料部分的物理暴露的表面上进行金属化。 可以在低于600℃的温度下进行金属和至少一种元素半导体材料的金属半导体合金，以提供具有良好限定的器件轮廓和可靠的金属化接触的高电子迁移率晶体管。

公开(公告)号：US09466651B2

公开(公告)日：2016-10-11

申请号：US14966161

申请日：2015-12-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Stephen W. Bedell, III ,  Bahman Hekmatshoartabari ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L27/32 ,  H01L27/12 ,  H01L51/52

CPC classification number: H01L27/3262 ,  H01L21/7624 ,  H01L21/76254 ,  H01L27/1218 ,  H01L27/1262 ,  H01L27/1266 ,  H01L27/3248 ,  H01L51/5218 ,  H01L51/5221 ,  H01L51/5237 ,  H01L2227/323 ,  H01L2227/326 ,  H01L2251/5338

Abstract: High resolution active matrix structures are fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed using a semiconductor-on-insulator substrate. The substrate is thinned using a layer transfer technique or chemical/mechanical processing. Driver transistors are formed on the semiconductor layer of the substrate along with additional circuits that provide other functions such as computing or sensing. Contacts to passive devices such as organic light emitting diodes may be provided by heavily doped regions formed in the handle layer of the substrate and then isolated. A gate dielectric layer may be formed on the semiconductor layer, which functions as a channel layer, or the insulator layer of the substrate may be employed as a gate dielectric layer.

公开(公告)号：US20160099297A1

公开(公告)日：2016-04-07

申请号：US14966161

申请日：2015-12-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Stephen W. Bedell, III ,  Bahman Hekmatshoartabari ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC: H01L27/32 ,  H01L51/52 ,  H01L27/12

CPC classification number: H01L27/3262 ,  H01L21/7624 ,  H01L21/76254 ,  H01L27/1218 ,  H01L27/1262 ,  H01L27/1266 ,  H01L27/3248 ,  H01L51/5218 ,  H01L51/5221 ,  H01L51/5237 ,  H01L2227/323 ,  H01L2227/326 ,  H01L2251/5338

Abstract: High resolution active matrix structures are fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed using a semiconductor-on-insulator substrate. The substrate is thinned using a layer transfer technique or chemical/mechanical processing. Driver transistors are formed on the semiconductor layer of the substrate along with additional circuits that provide other functions such as computing or sensing. Contacts to passive devices such as organic light emitting diodes may be provided by heavily doped regions formed in the handle layer of the substrate and then isolated. A gate dielectric layer may be formed on the semiconductor layer, which functions as a channel layer, or the insulator layer of the substrate may be employed as a gate dielectric layer.

公开(公告)号：US09275578B2

公开(公告)日：2016-03-01

申请号：US13969791

申请日：2013-08-19

Applicant: GLOBALFOUNDRIES INC.

Inventor： Bahman Hekmatshoartabari ,  Davood Shahrjerdi

IPC: G09G3/30 ,  G09G3/32

CPC classification number: G09G3/3258 ,  G09G2300/0842 ,  G09G2300/088

Abstract: A pixel circuit for an active matrix organic light-emitting diode display system includes a first input node, a second input node, first power supply node, a second power supply node, a triode switch circuit, a storage capacitor, an organic light emitting diode, and a resistive element. The triode switch circuit is connected to the first and second input nodes. The storage capacitor is connected between an output of the triode switch circuit and the second power supply node. The organic light-emitting diode is connected between the output of the triode switch circuit and the second power supply node. The first resistive element is connected between the output of the triode switch circuit and the first power supply node.

Abstract translation: 有源矩阵有机发光二极管显示系统的像素电路包括第一输入节点，第二输入节点，第一电源节点，第二电源节点，三极管开关电路，存储电容器，有机发光二极管 ，和电阻元件。 三极管开关电路连接到第一和第二输入节点。 存储电容器连接在三极管开关电路的输出端和第二电源节点之间。 有机发光二极管连接在三极管开关电路的输出端和第二电源节点之间。 第一电阻元件连接在三极管开关电路的输出端和第一电源节点之间。